input  [4:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;


    mux5p  mux_0 (.out(out[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl[4:0]));
    mux5p  mux_1 (.out(out[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl[4:0]));
    mux5p  mux_2 (.out(out[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl[4:0]));
    mux5p  mux_3 (.out(out[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl[4:0]));

endmodule 


module mux6_4 (out, in5, in4, in3, in2, in1, in0, sel);
    output [3:0] out;
    input  [3:0] in5; 
    input  [3:0] in4; 
    input  [3:0] in3; 
    input  [3:0] in2; 
    input  [3:0] in1; 
    input  [3:0] in0; 
    input  [5:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux6p  mux_0 (.out(out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux6p  mux_1 (.out(out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux6p  mux_2 (.out(out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux6p  mux_3 (.out(out[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));

endmodule 


module mux7_4 (out, in6, in5, in4, in3, in2, in1, in0, sel);
    output [3:0] out;
    input  [3:0] in6; 
    input  [3:0] in5; 
    input  [3:0] in4; 
    input  [3:0] in3; 
    input  [3:0] in2; 
    input  [3:0] in1; 
    input  [3:0] in0; 
    input  [6:0] sel;

    mux7p  mux_0 (.out(out[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel));
    mux7p  mux_1 (.out(out[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel));
    mux7p  mux_2 (.out(out[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel));
    mux7p  mux_3 (.out(out[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel));

endmodule 



module mux8_4 (out, in7, in6, in5, in4, in3, in2, in1, in0, sel);
    output [3:0] out;
    input  [3:0] in7; 
    input  [3:0] in6; 
    input  [3:0] in5; 
    input  [3:0] in4; 
    input  [3:0] in3; 
    input  [3:0] in2; 
    input  [3:0] in1; 
    input  [3:0] in0; 
    input  [7:0] sel;
wire  [7:0] slb;
wire  [7:0] sl;
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux8p  mux_0 (.out(out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux8p  mux_1 (.out(out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux8p  mux_2 (.out(out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux8p  mux_3 (.out(out[3]), .in7(in7[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));

endmodule 


module mux2_5 (out, in1, in0, sel);
    output [4:0] out;
    input  [4:0] in1; 
    input  [4:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));

endmodule 


module mux3_5 (out, in2, in1, in0, sel);
    output [4:0] out;
    input  [4:0] in2; 
    input  [4:0] in1; 
    input  [4:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux3p  mux_2 (.out(out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux3p  mux_3 (.out(out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux3p  mux_4 (.out(out[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));

endmodule 



module mux4_5 (out, in3, in2, in1, in0, sel);
    output [4:0] out;
    input  [4:0] in3; 
    input  [4:0] in2; 
    input  [4:0] in1; 
    input  [4:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux4p  mux_2 (.out(out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux4p  mux_3 (.out(out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux4p  mux_4 (.out(out[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));

endmodule 


module mux5_5 (out, in4, in3, in2, in1, in0, sel);
    output [4:0] out;
    input  [4:0] in4; 
    input  [4:0] in3; 
    input  [4:0] in2; 
    input  [4:0] in1; 
    input  [4:0] in0; 
    input  [4:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;


    mux5p  mux_0 (.out(out[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl[4:0]));
    mux5p  mux_1 (.out(out[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl[4:0]));
    mux5p  mux_2 (.out(out[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl[4:0]));
    mux5p  mux_3 (.out(out[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl[4:0]));
    mux5p  mux_4 (.out(out[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl[4:0]));

endmodule 


module mux6_5 (out, in5, in4, in3, in2, in1, in0, sel);
    output [4:0] out;
    input  [4:0] in5; 
    input  [4:0] in4; 
    input  [4:0] in3; 
    input  [4:0] in2; 
    input  [4:0] in1; 
    input  [4:0] in0; 
    input  [5:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux6p  mux_0 (.out(out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux6p  mux_1 (.out(out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux6p  mux_2 (.out(out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux6p  mux_3 (.out(out[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux6p  mux_4 (.out(out[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));

endmodule 


module mux7_5 (out, in6, in5, in4, in3, in2, in1, in0, sel);
    output [4:0] out;
    input  [4:0] in6; 
    input  [4:0] in5; 
    input  [4:0] in4; 
    input  [4:0] in3; 
    input  [4:0] in2; 
    input  [4:0] in1; 
    input  [4:0] in0; 
    input  [6:0] sel;

    mux7p  mux_0 (.out(out[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel));
    mux7p  mux_1 (.out(out[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel));
    mux7p  mux_2 (.out(out[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel));
    mux7p  mux_3 (.out(out[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel));
    mux7p  mux_4 (.out(out[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel));

endmodule 



module mux8_5 (out, in7, in6, in5, in4, in3, in2, in1, in0, sel);
    output [4:0] out;
    input  [4:0] in7; 
    input  [4:0] in6; 
    input  [4:0] in5; 
    input  [4:0] in4; 
    input  [4:0] in3; 
    input  [4:0] in2; 
    input  [4:0] in1; 
    input  [4:0] in0; 
    input  [7:0] sel;
wire  [7:0] slb;
wire  [7:0] sl;
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux8p  mux_0 (.out(out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux8p  mux_1 (.out(out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux8p  mux_2 (.out(out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux8p  mux_3 (.out(out[3]), .in7(in7[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux8p  mux_4 (.out(out[4]), .in7(in7[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));

endmodule 



module mux2_6 (out, in1, in0, sel);
    output [5:0] out;
    input  [5:0] in1; 
    input  [5:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux2p  mux_5 (.out(out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));

endmodule 



module mux3_6 (out, in2, in1, in0, sel);
    output [5:0] out;
    input  [5:0] in2; 
    input  [5:0] in1; 
    input  [5:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux3p  mux_2 (.out(out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux3p  mux_3 (.out(out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux3p  mux_4 (.out(out[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux3p  mux_5 (.out(out[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));

endmodule 


module mux4_6 (out, in3, in2, in1, in0, sel);
    output [5:0] out;
    input  [5:0] in3; 
    input  [5:0] in2; 
    input  [5:0] in1; 
    input  [5:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux4p  mux_2 (.out(out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux4p  mux_3 (.out(out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux4p  mux_4 (.out(out[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux4p  mux_5 (.out(out[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));

endmodule 


module mux5_6 (out, in4, in3, in2, in1, in0, sel);
    output [5:0] out;
    input  [5:0] in4; 
    input  [5:0] in3; 
    input  [5:0] in2; 
    input  [5:0] in1; 
    input  [5:0] in0; 
    input  [4:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;


    mux5p  mux_0 (.out(out[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl[4:0]));
    mux5p  mux_1 (.out(out[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl[4:0]));
    mux5p  mux_2 (.out(out[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl[4:0]));
    mux5p  mux_3 (.out(out[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl[4:0]));
    mux5p  mux_4 (.out(out[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl[4:0]));
    mux5p  mux_5 (.out(out[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl[4:0]));

endmodule 


module mux6_6 (out, in5, in4, in3, in2, in1, in0, sel);
    output [5:0] out;
    input  [5:0] in5; 
    input  [5:0] in4; 
    input  [5:0] in3; 
    input  [5:0] in2; 
    input  [5:0] in1; 
    input  [5:0] in0; 
    input  [5:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux6p  mux_0 (.out(out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux6p  mux_1 (.out(out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux6p  mux_2 (.out(out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux6p  mux_3 (.out(out[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux6p  mux_4 (.out(out[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux6p  mux_5 (.out(out[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));

endmodule 


module mux7_6 (out, in6, in5, in4, in3, in2, in1, in0, sel);
    output [5:0] out;
    input  [5:0] in6; 
    input  [5:0] in5; 
    input  [5:0] in4; 
    input  [5:0] in3; 
    input  [5:0] in2; 
    input  [5:0] in1; 
    input  [5:0] in0; 
    input  [6:0] sel;

    mux7p  mux_0 (.out(out[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel));
    mux7p  mux_1 (.out(out[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel));
    mux7p  mux_2 (.out(out[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel));
    mux7p  mux_3 (.out(out[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel));
    mux7p  mux_4 (.out(out[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel));
    mux7p  mux_5 (.out(out[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sel));

endmodule 



module mux8_6 (out, in7, in6, in5, in4, in3, in2, in1, in0, sel);
    output [5:0] out;
    input  [5:0] in7; 
    input  [5:0] in6; 
    input  [5:0] in5; 
    input  [5:0] in4; 
    input  [5:0] in3; 
    input  [5:0] in2; 
    input  [5:0] in1; 
    input  [5:0] in0; 
    input  [7:0] sel;
wire  [7:0] slb;
wire  [7:0] sl;
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux8p  mux_0 (.out(out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux8p  mux_1 (.out(out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux8p  mux_2 (.out(out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux8p  mux_3 (.out(out[3]), .in7(in7[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux8p  mux_4 (.out(out[4]), .in7(in7[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux8p  mux_5 (.out(out[5]), .in7(in7[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));

endmodule 



module mux2_7 (out, in1, in0, sel);
    output [6:0] out;
    input  [6:0] in1; 
    input  [6:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux2p  mux_5 (.out(out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux2p  mux_6 (.out(out[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));

endmodule 


module mux3_7 (out, in2, in1, in0, sel);
    output [6:0] out;
    input  [6:0] in2; 
    input  [6:0] in1; 
    input  [6:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux3p  mux_2 (.out(out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux3p  mux_3 (.out(out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux3p  mux_4 (.out(out[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux3p  mux_5 (.out(out[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux3p  mux_6 (.out(out[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));

endmodule 


module mux4_7 (out, in3, in2, in1, in0, sel);
    output [6:0] out;
    input  [6:0] in3; 
    input  [6:0] in2; 
    input  [6:0] in1; 
    input  [6:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux4p  mux_2 (.out(out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux4p  mux_3 (.out(out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux4p  mux_4 (.out(out[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux4p  mux_5 (.out(out[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux4p  mux_6 (.out(out[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));

endmodule 


module mux5_7 (out, in4, in3, in2, in1, in0, sel);
    output [6:0] out;
    input  [6:0] in4; 
    input  [6:0] in3; 
    input  [6:0] in2; 
    input  [6:0] in1; 
    input  [6:0] in0; 
    input  [4:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;


    mux5p  mux_0 (.out(out[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl[4:0]));
    mux5p  mux_1 (.out(out[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl[4:0]));
    mux5p  mux_2 (.out(out[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl[4:0]));
    mux5p  mux_3 (.out(out[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl[4:0]));
    mux5p  mux_4 (.out(out[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl[4:0]));
    mux5p  mux_5 (.out(out[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl[4:0]));
    mux5p  mux_6 (.out(out[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl[4:0]));

endmodule 


module mux6_7 (out, in5, in4, in3, in2, in1, in0, sel);
    output [6:0] out;
    input  [6:0] in5; 
    input  [6:0] in4; 
    input  [6:0] in3; 
    input  [6:0] in2; 
    input  [6:0] in1; 
    input  [6:0] in0; 
    input  [5:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux6p  mux_0 (.out(out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux6p  mux_1 (.out(out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux6p  mux_2 (.out(out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux6p  mux_3 (.out(out[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux6p  mux_4 (.out(out[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux6p  mux_5 (.out(out[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux6p  mux_6 (.out(out[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));

endmodule 


module mux7_7 (out, in6, in5, in4, in3, in2, in1, in0, sel);
    output [6:0] out;
    input  [6:0] in6; 
    input  [6:0] in5; 
    input  [6:0] in4; 
    input  [6:0] in3; 
    input  [6:0] in2; 
    input  [6:0] in1; 
    input  [6:0] in0; 
    input  [6:0] sel;

    mux7p  mux_0 (.out(out[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel));
    mux7p  mux_1 (.out(out[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel));
    mux7p  mux_2 (.out(out[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel));
    mux7p  mux_3 (.out(out[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel));
    mux7p  mux_4 (.out(out[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel));
    mux7p  mux_5 (.out(out[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sel));
    mux7p  mux_6 (.out(out[6]), .in6(in6[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sel));

endmodule 


module mux8_7 (out, in7, in6, in5, in4, in3, in2, in1, in0, sel);
    output [6:0] out;
    input  [6:0] in7; 
    input  [6:0] in6; 
    input  [6:0] in5; 
    input  [6:0] in4; 
    input  [6:0] in3; 
    input  [6:0] in2; 
    input  [6:0] in1; 
    input  [6:0] in0; 
    input  [7:0] sel;
wire  [7:0] slb;
wire  [7:0] sl;
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux8p  mux_0 (.out(out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux8p  mux_1 (.out(out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux8p  mux_2 (.out(out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux8p  mux_3 (.out(out[3]), .in7(in7[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux8p  mux_4 (.out(out[4]), .in7(in7[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux8p  mux_5 (.out(out[5]), .in7(in7[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux8p  mux_6 (.out(out[6]), .in7(in7[6]), .in6(in6[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));

endmodule 



module mux2_8 (out, in1, in0, sel);
    output [7:0] out;
    input  [7:0] in1; 
    input  [7:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux2p  mux_5 (.out(out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux2p  mux_6 (.out(out[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux2p  mux_7 (.out(out[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));

endmodule 



module mux3_8 (out, in2, in1, in0, sel);
    output [7:0] out;
    input  [7:0] in2; 
    input  [7:0] in1; 
    input  [7:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux3p  mux_2 (.out(out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux3p  mux_3 (.out(out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux3p  mux_4 (.out(out[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux3p  mux_5 (.out(out[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux3p  mux_6 (.out(out[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux3p  mux_7 (.out(out[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));

endmodule 



module mux4_8 (out, in3, in2, in1, in0, sel);
    output [7:0] out;
    input  [7:0] in3; 
    input  [7:0] in2; 
    input  [7:0] in1; 
    input  [7:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux4p  mux_2 (.out(out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux4p  mux_3 (.out(out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux4p  mux_4 (.out(out[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux4p  mux_5 (.out(out[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux4p  mux_6 (.out(out[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux4p  mux_7 (.out(out[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));

endmodule 



module mux5_8 (out, in4, in3, in2, in1, in0, sel);
    output [7:0] out;
    input  [7:0] in4; 
    input  [7:0] in3; 
    input  [7:0] in2; 
    input  [7:0] in1; 
    input  [7:0] in0; 
    input  [4:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;


    mux5p  mux_0 (.out(out[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl[4:0]));
    mux5p  mux_1 (.out(out[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl[4:0]));
    mux5p  mux_2 (.out(out[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl[4:0]));
    mux5p  mux_3 (.out(out[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl[4:0]));
    mux5p  mux_4 (.out(out[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl[4:0]));
    mux5p  mux_5 (.out(out[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl[4:0]));
    mux5p  mux_6 (.out(out[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl[4:0]));
    mux5p  mux_7 (.out(out[7]), .in4(in4[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl[4:0]));

endmodule 


module mux6_8 (out, in5, in4, in3, in2, in1, in0, sel);
    output [7:0] out;
    input  [7:0] in5; 
    input  [7:0] in4; 
    input  [7:0] in3; 
    input  [7:0] in2; 
    input  [7:0] in1; 
    input  [7:0] in0; 
    input  [5:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux6p  mux_0 (.out(out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux6p  mux_1 (.out(out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux6p  mux_2 (.out(out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux6p  mux_3 (.out(out[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux6p  mux_4 (.out(out[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux6p  mux_5 (.out(out[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux6p  mux_6 (.out(out[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux6p  mux_7 (.out(out[7]), .in5(in5[7]), .in4(in4[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));

endmodule 


module mux7_8 (out, in6, in5, in4, in3, in2, in1, in0, sel);
    output [7:0] out;
    input  [7:0] in6; 
    input  [7:0] in5; 
    input  [7:0] in4; 
    input  [7:0] in3; 
    input  [7:0] in2; 
    input  [7:0] in1; 
    input  [7:0] in0; 
    input  [6:0] sel;

    mux7p  mux_0 (.out(out[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel));
    mux7p  mux_1 (.out(out[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel));
    mux7p  mux_2 (.out(out[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel));
    mux7p  mux_3 (.out(out[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel));
    mux7p  mux_4 (.out(out[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel));
    mux7p  mux_5 (.out(out[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sel));
    mux7p  mux_6 (.out(out[6]), .in6(in6[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sel));
    mux7p  mux_7 (.out(out[7]), .in6(in6[7]), .in5(in5[7]), .in4(in4[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sel));

endmodule 



module mux8_8 (out, in7, in6, in5, in4, in3, in2, in1, in0, sel);
    output [7:0] out;
    input  [7:0] in7; 
    input  [7:0] in6; 
    input  [7:0] in5; 
    input  [7:0] in4; 
    input  [7:0] in3; 
    input  [7:0] in2; 
    input  [7:0] in1; 
    input  [7:0] in0; 
    input  [7:0] sel;
wire  [7:0] slb;
wire  [7:0] sl;
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux8p  mux_0 (.out(out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux8p  mux_1 (.out(out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux8p  mux_2 (.out(out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux8p  mux_3 (.out(out[3]), .in7(in7[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux8p  mux_4 (.out(out[4]), .in7(in7[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux8p  mux_5 (.out(out[5]), .in7(in7[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux8p  mux_6 (.out(out[6]), .in7(in7[6]), .in6(in6[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux8p  mux_7 (.out(out[7]), .in7(in7[7]), .in6(in6[7]), .in5(in5[7]), .in4(in4[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));

endmodule 



module mux2_16 (out, in1, in0, sel);
    output [15:0] out;
    input  [15:0] in1; 
    input  [15:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux2p  mux_5 (.out(out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux2p  mux_6 (.out(out[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux2p  mux_7 (.out(out[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux2p  mux_8 (.out(out[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux2p  mux_9 (.out(out[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux2p  mux_10 (.out(out[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux2p  mux_11 (.out(out[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux2p  mux_12 (.out(out[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux2p  mux_13 (.out(out[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux2p  mux_14 (.out(out[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux2p  mux_15 (.out(out[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));

endmodule 

module mux2_24 (out, in1, in0, sel);
    output [23:0] out;
    input  [23:0] in1; 
    input  [23:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;
    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel));
    mux2p  mux_5 (.out(out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sel));
    mux2p  mux_6 (.out(out[6]), .in1(in1[6]), .in0(in0[6]), .sel(sel));
    mux2p  mux_7 (.out(out[7]), .in1(in1[7]), .in0(in0[7]), .sel(sel));
    mux2p  mux_8 (.out(out[8]), .in1(in1[8]), .in0(in0[8]), .sel(sel));
    mux2p  mux_9 (.out(out[9]), .in1(in1[9]), .in0(in0[9]), .sel(sel));
    mux2p  mux_10 (.out(out[10]), .in1(in1[10]), .in0(in0[10]), .sel(sel));
    mux2p  mux_11 (.out(out[11]), .in1(in1[11]), .in0(in0[11]), .sel(sel));
    mux2p  mux_12 (.out(out[12]), .in1(in1[12]), .in0(in0[12]), .sel(sel));
    mux2p  mux_13 (.out(out[13]), .in1(in1[13]), .in0(in0[13]), .sel(sel));
    mux2p  mux_14 (.out(out[14]), .in1(in1[14]), .in0(in0[14]), .sel(sel));
    mux2p  mux_15 (.out(out[15]), .in1(in1[15]), .in0(in0[15]), .sel(sel));
    mux2p  mux_16 (.out(out[16]), .in1(in1[16]), .in0(in0[16]), .sel(sel));
    mux2p  mux_17 (.out(out[17]), .in1(in1[17]), .in0(in0[17]), .sel(sel));
    mux2p  mux_18 (.out(out[18]), .in1(in1[18]), .in0(in0[18]), .sel(sel));
    mux2p  mux_19 (.out(out[19]), .in1(in1[19]), .in0(in0[19]), .sel(sel));
    mux2p  mux_20 (.out(out[20]), .in1(in1[20]), .in0(in0[20]), .sel(sel));
    mux2p  mux_21 (.out(out[21]), .in1(in1[21]), .in0(in0[21]), .sel(sel));
    mux2p  mux_22 (.out(out[22]), .in1(in1[22]), .in0(in0[22]), .sel(sel));
    mux2p  mux_23 (.out(out[23]), .in1(in1[23]), .in0(in0[23]), .sel(sel));

endmodule 



module mux3_24 (out, in2, in1, in0, sel);
    output [23:0] out;
    input  [23:0] in2; 
    input  [23:0] in1; 
    input  [23:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;	
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux3p  mux_2 (.out(out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux3p  mux_3 (.out(out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux3p  mux_4 (.out(out[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux3p  mux_5 (.out(out[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux3p  mux_6 (.out(out[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux3p  mux_7 (.out(out[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux3p  mux_8 (.out(out[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux3p  mux_9 (.out(out[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux3p  mux_10 (.out(out[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux3p  mux_11 (.out(out[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux3p  mux_12 (.out(out[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux3p  mux_13 (.out(out[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux3p  mux_14 (.out(out[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux3p  mux_15 (.out(out[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux3p  mux_16 (.out(out[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux3p  mux_17 (.out(out[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux3p  mux_18 (.out(out[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux3p  mux_19 (.out(out[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux3p  mux_20 (.out(out[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux3p  mux_21 (.out(out[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux3p  mux_22 (.out(out[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux3p  mux_23 (.out(out[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));

endmodule 



module mux4_24 (out, in3, in2, in1, in0, sel);
    output [23:0] out;
    input  [23:0] in3; 
    input  [23:0] in2; 
    input  [23:0] in1; 
    input  [23:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;	
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux4p  mux_2 (.out(out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux4p  mux_3 (.out(out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux4p  mux_4 (.out(out[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux4p  mux_5 (.out(out[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux4p  mux_6 (.out(out[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux4p  mux_7 (.out(out[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux4p  mux_8 (.out(out[8]), .in3(in3[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux4p  mux_9 (.out(out[9]), .in3(in3[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux4p  mux_10 (.out(out[10]), .in3(in3[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux4p  mux_11 (.out(out[11]), .in3(in3[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux4p  mux_12 (.out(out[12]), .in3(in3[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux4p  mux_13 (.out(out[13]), .in3(in3[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux4p  mux_14 (.out(out[14]), .in3(in3[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux4p  mux_15 (.out(out[15]), .in3(in3[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux4p  mux_16 (.out(out[16]), .in3(in3[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux4p  mux_17 (.out(out[17]), .in3(in3[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux4p  mux_18 (.out(out[18]), .in3(in3[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux4p  mux_19 (.out(out[19]), .in3(in3[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux4p  mux_20 (.out(out[20]), .in3(in3[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux4p  mux_21 (.out(out[21]), .in3(in3[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux4p  mux_22 (.out(out[22]), .in3(in3[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux4p  mux_23 (.out(out[23]), .in3(in3[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));

endmodule 



module mux8_24 (out, in7, in6, in5, in4, in3, in2, in1, in0, sel);
    output [23:0] out;
    input  [23:0] in7; 
    input  [23:0] in6; 
    input  [23:0] in5; 
    input  [23:0] in4; 
    input  [23:0] in3; 
    input  [23:0] in2; 
    input  [23:0] in1; 
    input  [23:0] in0; 
    input  [7:0] sel;
wire  [7:0] slb;
wire  [7:0] sl;	
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux8p  mux_0 (.out(out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux8p  mux_1 (.out(out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux8p  mux_2 (.out(out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux8p  mux_3 (.out(out[3]), .in7(in7[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux8p  mux_4 (.out(out[4]), .in7(in7[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux8p  mux_5 (.out(out[5]), .in7(in7[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux8p  mux_6 (.out(out[6]), .in7(in7[6]), .in6(in6[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux8p  mux_7 (.out(out[7]), .in7(in7[7]), .in6(in6[7]), .in5(in5[7]), .in4(in4[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux8p  mux_8 (.out(out[8]), .in7(in7[8]), .in6(in6[8]), .in5(in5[8]), .in4(in4[8]), .in3(in3[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux8p  mux_9 (.out(out[9]), .in7(in7[9]), .in6(in6[9]), .in5(in5[9]), .in4(in4[9]), .in3(in3[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux8p  mux_10 (.out(out[10]), .in7(in7[10]), .in6(in6[10]), .in5(in5[10]), .in4(in4[10]), .in3(in3[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux8p  mux_11 (.out(out[11]), .in7(in7[11]), .in6(in6[11]), .in5(in5[11]), .in4(in4[11]), .in3(in3[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux8p  mux_12 (.out(out[12]), .in7(in7[12]), .in6(in6[12]), .in5(in5[12]), .in4(in4[12]), .in3(in3[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux8p  mux_13 (.out(out[13]), .in7(in7[13]), .in6(in6[13]), .in5(in5[13]), .in4(in4[13]), .in3(in3[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux8p  mux_14 (.out(out[14]), .in7(in7[14]), .in6(in6[14]), .in5(in5[14]), .in4(in4[14]), .in3(in3[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux8p  mux_15 (.out(out[15]), .in7(in7[15]), .in6(in6[15]), .in5(in5[15]), .in4(in4[15]), .in3(in3[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux8p  mux_16 (.out(out[16]), .in7(in7[16]), .in6(in6[16]), .in5(in5[16]), .in4(in4[16]), .in3(in3[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux8p  mux_17 (.out(out[17]), .in7(in7[17]), .in6(in6[17]), .in5(in5[17]), .in4(in4[17]), .in3(in3[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux8p  mux_18 (.out(out[18]), .in7(in7[18]), .in6(in6[18]), .in5(in5[18]), .in4(in4[18]), .in3(in3[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux8p  mux_19 (.out(out[19]), .in7(in7[19]), .in6(in6[19]), .in5(in5[19]), .in4(in4[19]), .in3(in3[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux8p  mux_20 (.out(out[20]), .in7(in7[20]), .in6(in6[20]), .in5(in5[20]), .in4(in4[20]), .in3(in3[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux8p  mux_21 (.out(out[21]), .in7(in7[21]), .in6(in6[21]), .in5(in5[21]), .in4(in4[21]), .in3(in3[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux8p  mux_22 (.out(out[22]), .in7(in7[22]), .in6(in6[22]), .in5(in5[22]), .in4(in4[22]), .in3(in3[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux8p  mux_23 (.out(out[23]), .in7(in7[23]), .in6(in6[23]), .in5(in5[23]), .in4(in4[23]), .in3(in3[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));

endmodule 


module mux2_29 (out, in1, in0, sel);
    output [28:0] out;
    input  [28:0] in1; 
    input  [28:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux2p  mux_5 (.out(out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux2p  mux_6 (.out(out[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux2p  mux_7 (.out(out[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux2p  mux_8 (.out(out[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux2p  mux_9 (.out(out[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux2p  mux_10 (.out(out[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux2p  mux_11 (.out(out[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux2p  mux_12 (.out(out[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux2p  mux_13 (.out(out[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux2p  mux_14 (.out(out[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux2p  mux_15 (.out(out[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux2p  mux_16 (.out(out[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux2p  mux_17 (.out(out[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux2p  mux_18 (.out(out[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux2p  mux_19 (.out(out[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux2p  mux_20 (.out(out[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux2p  mux_21 (.out(out[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux2p  mux_22 (.out(out[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux2p  mux_23 (.out(out[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux2p  mux_24 (.out(out[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux2p  mux_25 (.out(out[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux2p  mux_26 (.out(out[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux2p  mux_27 (.out(out[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux2p  mux_28 (.out(out[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));

endmodule 



module mux2_30 (out, in1, in0, sel);
    output [29:0] out;
    input  [29:0] in1; 
    input  [29:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux2p  mux_5 (.out(out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux2p  mux_6 (.out(out[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux2p  mux_7 (.out(out[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux2p  mux_8 (.out(out[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux2p  mux_9 (.out(out[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux2p  mux_10 (.out(out[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux2p  mux_11 (.out(out[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux2p  mux_12 (.out(out[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux2p  mux_13 (.out(out[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux2p  mux_14 (.out(out[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux2p  mux_15 (.out(out[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux2p  mux_16 (.out(out[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux2p  mux_17 (.out(out[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux2p  mux_18 (.out(out[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux2p  mux_19 (.out(out[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux2p  mux_20 (.out(out[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux2p  mux_21 (.out(out[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));