.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux8_d_6
(mx_out, sel, in0, in1,in2,in3,in4,in5,in6,in7);
output [5:0] mx_out;
input [2:0] sel;
input [5:0] in7;
input [5:0] in6;
input [5:0] in5;
input [5:0] in4;
input [5:0] in3;
input [5:0] in2;
input [5:0] in1;
input [5:0] in0;
//wire [7:0] select;
wire [7:0] sl;
wire [7:0] slb;
mj_p_muxdec8_8 i_mj_p_muxdec8_8 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux8_6 mj_p_mux8_6_0 ( .mx_out(mx_out),
.in7(in7),
.in6(in6),
.in5(in5),
.in4(in4),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
![[Up: fpu_dec fpumux]](v2html-up.gif)
module mj_s_mux2_d_8 (mx_out, sel, in0, in1);
output [7:0] mx_out;
input sel;
input [7:0] in0 , in1 ;
/*
wire sel_not, mux_sel;
assign sel_not = ~sel;
assign mux_sel = sel;
assign mx_out = (mux_sel & in1 | sel_not & in0) ;
*/
wire selb;
wire sel1;
wire sel1b;
assign selb = ~sel;
assign sel1 = ~selb;
assign sel1b = ~sel1;
mj_p_mux2_8 mj_p_mux2_8_0 (
.mx_out(mx_out),
.in1(in1),
.in0(in0),
.sel(sel1) ,
.sel_l(sel1b)) ;
endmodule
module mj_s_mux3_d_8 (mx_out, sel, in0, in1,in2);
output [7:0] mx_out;
input [1:0] sel;
input [7:0] in2;
input [7:0] in1;
input [7:0] in0;
//wire [2:0] select;
wire [2:0] sl;
wire [2:0] slb;
mj_p_muxdec3_8 i_mj_p_muxdec3 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux3_8 mj_p_mux3_8_0 ( .mx_out(mx_out),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux4_d_8 (mx_out, sel, in0, in1,in2,in3);
output [7:0] mx_out;
input [1:0] sel;
input [7:0] in3;
input [7:0] in2;
input [7:0] in1;
input [7:0] in0;
//wire [3:0] select;
wire [3:0] sl;
wire [3:0] slb;
mj_p_muxdec4_8 i_mj_p_muxdec4 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux4_8 mj_p_mux4_8_0 ( .mx_out(mx_out),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux6_d_8 (mx_out, sel, in0, in1,in2,in3,in4,in5);
output [7:0] mx_out;
input [2:0] sel;
input [7:0] in5;
input [7:0] in4;
input [7:0] in3;
input [7:0] in2;
input [7:0] in1;
input [7:0] in0;
//wire [5:0] select;
wire [5:0] sl;
wire [5:0] slb;
mj_p_muxdec6_8 i_mj_p_muxdec6 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux6_8 mj_p_mux6_8_0 ( .mx_out(mx_out),
.in5(in5),
.in4(in4),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux8_d_8 (mx_out, sel, in0, in1,in2,in3,in4,in5,in6,in7);
output [7:0] mx_out;
input [2:0] sel;
input [7:0] in7;
input [7:0] in6;
input [7:0] in5;
input [7:0] in4;
input [7:0] in3;
input [7:0] in2;
input [7:0] in1;
input [7:0] in0;
//wire [7:0] select;
wire [7:0] sl;
wire [7:0] slb;
mj_p_muxdec8_8 i_mj_p_muxdec8_8 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux8_8 mj_p_mux8_8_0 ( .mx_out(mx_out),
.in7(in7),
.in6(in6),
.in5(in5),
.in4(in4),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux2_d_16 (mx_out, sel, in0, in1);
output [15:0] mx_out;
input sel;
input [15:0] in0 , in1 ;
/*
wire sel_not, mux_sel;
assign sel_not = ~sel;
assign mux_sel = sel;
assign mx_out = (mux_sel & in1 | sel_not & in0) ;
*/
wire selb;
wire sel1;
wire sel1b;
assign selb = ~sel;
assign sel1 = ~selb;
assign sel1b = ~sel1;
mj_p_mux2_16 mj_p_mux2_16_0 (
.mx_out(mx_out),
.in1(in1),
.in0(in0),
.sel(sel1) ,
.sel_l(sel1b)) ;
endmodule
module mj_s_mux3_d_16 (mx_out, sel, in0, in1,in2);
output [15:0] mx_out;
input [1:0] sel;
input [15:0] in2;
input [15:0] in1;
input [15:0] in0;
//wire [2:0] select;
wire [2:0] sl;
wire [2:0] slb;
mj_p_muxdec3_16 i_mj_p_muxdec3 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux3_16 mj_p_mux3_16_0 ( .mx_out(mx_out),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux4_d_16 (mx_out, sel, in0, in1,in2,in3);
output [15:0] mx_out;
input [1:0] sel;
input [15:0] in3;
input [15:0] in2;
input [15:0] in1;
input [15:0] in0;
//wire [3:0] select;
wire [3:0] sl;
wire [3:0] slb;
mj_p_muxdec4_16 i_mj_p_muxdec4 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux4_16 mj_p_mux4_16_0 ( .mx_out(mx_out),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux6_d_16 (mx_out, sel, in0, in1,in2,in3,in4,in5);
output [15:0] mx_out;
input [2:0] sel;
input [15:0] in5;
input [15:0] in4;
input [15:0] in3;
input [15:0] in2;
input [15:0] in1;
input [15:0] in0;
//wire [5:0] select;
wire [5:0] sl;
wire [5:0] slb;
mj_p_muxdec6_16 i_mj_p_muxdec6 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux6_16 mj_p_mux6_16_0 ( .mx_out(mx_out),
.in5(in5),
.in4(in4),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux8_d_16 (mx_out, sel, in0, in1,in2,in3,in4,in5,in6,in7);
output [15:0] mx_out;
input [2:0] sel;
input [15:0] in7;
input [15:0] in6;
input [15:0] in5;
input [15:0] in4;
input [15:0] in3;
input [15:0] in2;
input [15:0] in1;
input [15:0] in0;
//wire [7:0] select;
wire [7:0] sl;
wire [7:0] slb;
mj_p_muxdec8_16 i_mj_p_muxdec8_8 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux8_16 mj_p_mux8_16_0 ( .mx_out(mx_out),
.in7(in7),
.in6(in6),
.in5(in5),
.in4(in4),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux2_d_32 (mx_out, sel, in0, in1);
output [31:0] mx_out;
input sel;
input [31:0] in0 , in1 ;
/*
wire sel_not, mux_sel;
assign sel_not = ~sel;
assign mux_sel = sel;
assign mx_out = (mux_sel & in1 | sel_not & in0) ;
*/
wire selb;
wire sel1;
wire sel1b;
assign selb = ~sel;
assign sel1 = ~selb;
assign sel1b = ~sel1;
mj_p_mux2_32 mj_p_mux2_32_0 (
.mx_out(mx_out),
.in1(in1),
.in0(in0),
.sel(sel1) ,
.sel_l(sel1b)) ;
endmodule
module mj_s_mux2l_d_32 (mx_out, sel, in0, in1);
output [31:0] mx_out;
input sel;
input [31:0] in0 , in1 ;
/*
wire sel_not, mux_sel;
assign sel_not = ~sel;
assign mux_sel = sel;
assign mx_out = (mux_sel & in1 | sel_not & in0) ;
*/
wire selb;
wire sel1;
wire sel1b;
assign selb = ~sel;
assign sel1 = ~selb;
assign sel1b = ~sel1;
mj_p_mux2l_32 mj_p_mux2l_32_0 (
.mx_out(mx_out),
.in1(in1),
.in0(in0),
.sel(sel1) ,
.sel_l(sel1b)) ;
endmodule
module mj_s_mux3_d_32 (mx_out, sel, in0, in1,in2);
output [31:0] mx_out;
input [1:0] sel;
input [31:0] in2;
input [31:0] in1;
input [31:0] in0;
//wire [2:0] select;
wire [2:0] sl;
wire [2:0] slb;
mj_p_muxdec3_32 i_mj_p_muxdec3 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux3_32 mj_p_mux3_32_0 ( .mx_out(mx_out),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux4_d_32 (mx_out, sel, in0, in1,in2,in3);
output [31:0] mx_out;
input [1:0] sel;
input [31:0] in3;
input [31:0] in2;
input [31:0] in1;
input [31:0] in0;
//wire [3:0] select;
wire [3:0] sl;
wire [3:0] slb;
mj_p_muxdec4_32 i_mj_p_muxdec4 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux4_32 mj_p_mux4_32_0 ( .mx_out(mx_out),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux6_d_32 (mx_out, sel, in0, in1,in2,in3,in4,in5);
output [31:0] mx_out;
input [2:0] sel;
input [31:0] in5;
input [31:0] in4;
input [31:0] in3;
input [31:0] in2;
input [31:0] in1;
input [31:0] in0;
//wire [5:0] select;
wire [5:0] sl;
wire [5:0] slb;
mj_p_muxdec6_32 i_mj_p_muxdec6 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux6_32 mj_p_mux6_32_0 ( .mx_out(mx_out),
.in5(in5),
.in4(in4),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
module mj_s_mux8_d_32 (mx_out, sel, in0, in1,in2,in3,in4,in5,in6,in7);
output [31:0] mx_out;
input [2:0] sel;
input [31:0] in7;
input [31:0] in6;
input [31:0] in5;
input [31:0] in4;
input [31:0] in3;
input [31:0] in2;
input [31:0] in1;
input [31:0] in0;
//wire [7:0] select;
wire [7:0] sl;
wire [7:0] slb;
mj_p_muxdec8_32 i_mj_p_muxdec8_8 ( .decb(slb),
.dec(sl),
.sel(sel)
);
mj_p_mux8_32 mj_p_mux8_32_0 ( .mx_out(mx_out),
.in7(in7),
.in6(in6),
.in5(in5),
.in4(in4),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sl) ,.sel_l(slb) );
endmodule
/************** One Hot Muxes **************/
... (truncated)
module mj_h_mux2 (
mx_out,
in1,
in0,
sel,
sel_l ) ;
output mx_out;
input in1;
input in0;
input sel;
input sel_l;
mj_p_mux2 mux_0 ( .mx_out(mx_out),
.in1(in1),
.in0(in0),
.sel(sel),
.sel_l(sel_l)
);
endmodule
... (truncated)
module mj_h_mux3 (
mx_out,
in2,
in1,
in0,
sel,
sel_l ) ;
output mx_out;
input in2;
input in1;
input in0;
input [2:0] sel;
input [2:0] sel_l;
mj_p_mux3 mux_0 ( .mx_out(mx_out),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sel),
.sel_l(sel_l)
);
endmodule
... (truncated)
module mj_h_mux4 (
mx_out,
in3,
in2,
in1,
in0,
sel,
sel_l ) ;
output mx_out;
input in3;
input in2;
input in1;
input in0;
input [3:0] sel;
input [3:0] sel_l;
mj_p_mux4 mux_0 ( .mx_out(mx_out),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sel),
.sel_l(sel_l)
);
endmodule
... (truncated)
module mj_h_mux6 (
mx_out,
in5,
in4,
in3,
in2,
in1,
in0,
sel,
sel_l ) ;
output mx_out;
input in5;
input in4;
input in3;
input in2;
input in1;
input in0;
input [5:0] sel;
input [5:0] sel_l;
mj_p_mux6 mux_0 ( .mx_out(mx_out),
.in5(in5),
.in4(in4),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sel),
.sel_l(sel_l)
);
endmodule
... (truncated)
module mj_h_mux8 (
mx_out,
in7,
in6,
in5,
in4,
in3,
in2,
in1,
in0,
sel,
sel_l ) ;
output mx_out;
input in7;
input in6;
input in5;
input in4;
input in3;
input in2;
input in1;
input in0;
input [7:0] sel;
input [7:0] sel_l;
mj_p_mux8 mux_0 ( .mx_out(mx_out),
.in7(in7),
.in6(in6),
.in5(in5),
.in4(in4),
.in3(in3),
.in2(in2),
.in1(in1),
.in0(in0),
.sel(sel),
.sel_l(sel_l)
);
endmodule
module mj_h_mux2_2 (mx_out, in1, in0, sel, sel_l);
output [1:0] mx_out;
input [1:0] in1;
input [1:0] in0;
input sel ; input sel_l;
mj_h_mux2 mux_0 (.mx_out(mx_out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_1 (.mx_out(mx_out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux3_2 (mx_out, in2, in1, in0, sel, sel_l);
output [1:0] mx_out;
input [1:0] in2;
input [1:0] in1;
input [1:0] in0;
input [2:0] sel; input [2:0] sel_l;
mj_h_mux3 mux_0 (.mx_out(mx_out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_1 (.mx_out(mx_out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux4_2 (mx_out, in3, in2, in1, in0, sel, sel_l);
output [1:0] mx_out;
input [1:0] in3;
input [1:0] in2;
input [1:0] in1;
input [1:0] in0;
input [3:0] sel; input [3:0] sel_l;
mj_h_mux4 mux_0 (.mx_out(mx_out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_1 (.mx_out(mx_out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux6_2 (mx_out, in5, in4, in3, in2, in1, in0, sel, sel_l);
output [1:0] mx_out;
input [1:0] in5;
input [1:0] in4;
input [1:0] in3;
input [1:0] in2;
input [1:0] in1;
input [1:0] in0;
input [5:0] sel; input [5:0] sel_l;
mj_h_mux6 mux_0 (.mx_out(mx_out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_1 (.mx_out(mx_out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux8_2 (mx_out, in7, in6, in5, in4, in3, in2, in1, in0, sel, sel_l);
output [1:0] mx_out;
input [1:0] in7;
input [1:0] in6;
input [1:0] in5;
input [1:0] in4;
input [1:0] in3;
input [1:0] in2;
input [1:0] in1;
input [1:0] in0;
input [7:0] sel; input [7:0] sel_l;
mj_h_mux8 mux_0 (.mx_out(mx_out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_1 (.mx_out(mx_out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux2_3 (mx_out, in1, in0, sel, sel_l);
output [2:0] mx_out;
input [2:0] in1;
input [2:0] in0;
input sel ; input sel_l;
mj_h_mux2 mux_0 (.mx_out(mx_out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_1 (.mx_out(mx_out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_2 (.mx_out(mx_out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux3_3 (mx_out, in2, in1, in0, sel, sel_l);
output [2:0] mx_out;
input [2:0] in2;
input [2:0] in1;
input [2:0] in0;
input [2:0] sel; input [2:0] sel_l;
mj_h_mux3 mux_0 (.mx_out(mx_out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_1 (.mx_out(mx_out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_2 (.mx_out(mx_out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux4_3 (mx_out, in3, in2, in1, in0, sel, sel_l);
output [2:0] mx_out;
input [2:0] in3;
input [2:0] in2;
input [2:0] in1;
input [2:0] in0;
input [3:0] sel; input [3:0] sel_l;
mj_h_mux4 mux_0 (.mx_out(mx_out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_1 (.mx_out(mx_out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_2 (.mx_out(mx_out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux6_3 (mx_out, in5, in4, in3, in2, in1, in0, sel, sel_l);
output [2:0] mx_out;
input [2:0] in5;
input [2:0] in4;
input [2:0] in3;
input [2:0] in2;
input [2:0] in1;
input [2:0] in0;
input [5:0] sel; input [5:0] sel_l;
mj_h_mux6 mux_0 (.mx_out(mx_out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_1 (.mx_out(mx_out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_2 (.mx_out(mx_out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux8_3 (mx_out, in7, in6, in5, in4, in3, in2, in1, in0, sel, sel_l);
output [2:0] mx_out;
input [2:0] in7;
input [2:0] in6;
input [2:0] in5;
input [2:0] in4;
input [2:0] in3;
input [2:0] in2;
input [2:0] in1;
input [2:0] in0;
input [7:0] sel; input [7:0] sel_l;
mj_h_mux8 mux_0 (.mx_out(mx_out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_1 (.mx_out(mx_out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_2 (.mx_out(mx_out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux2_4 (mx_out, in1, in0, sel, sel_l);
output [3:0] mx_out;
input [3:0] in1;
input [3:0] in0;
input sel ; input sel_l;
mj_h_mux2 mux_0 (.mx_out(mx_out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_1 (.mx_out(mx_out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_2 (.mx_out(mx_out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_3 (.mx_out(mx_out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux2_5 (mx_out, in1, in0, sel, sel_l);
output [4:0] mx_out;
input [4:0] in1;
input [4:0] in0;
input sel ; input sel_l;
mj_h_mux2 mux_0 (.mx_out(mx_out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_1 (.mx_out(mx_out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_2 (.mx_out(mx_out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_3 (.mx_out(mx_out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_4 (.mx_out(mx_out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux3_4 (mx_out, in2, in1, in0, sel, sel_l);
output [3:0] mx_out;
input [3:0] in2;
input [3:0] in1;
input [3:0] in0;
input [2:0] sel; input [2:0] sel_l;
mj_h_mux3 mux_0 (.mx_out(mx_out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_1 (.mx_out(mx_out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_2 (.mx_out(mx_out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_3 (.mx_out(mx_out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux4_4 (mx_out, in3, in2, in1, in0, sel, sel_l);
output [3:0] mx_out;
input [3:0] in3;
input [3:0] in2;
input [3:0] in1;
input [3:0] in0;
input [3:0] sel; input [3:0] sel_l;
mj_h_mux4 mux_0 (.mx_out(mx_out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_1 (.mx_out(mx_out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_2 (.mx_out(mx_out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_3 (.mx_out(mx_out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux6_4 (mx_out, in5, in4, in3, in2, in1, in0, sel, sel_l);
output [3:0] mx_out;
input [3:0] in5;
input [3:0] in4;
input [3:0] in3;
input [3:0] in2;
input [3:0] in1;
input [3:0] in0;
input [5:0] sel; input [5:0] sel_l;
mj_h_mux6 mux_0 (.mx_out(mx_out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_1 (.mx_out(mx_out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_2 (.mx_out(mx_out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_3 (.mx_out(mx_out[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux8_4 (mx_out, in7, in6, in5, in4, in3, in2, in1, in0, sel, sel_l);
output [3:0] mx_out;
input [3:0] in7;
input [3:0] in6;
input [3:0] in5;
input [3:0] in4;
input [3:0] in3;
input [3:0] in2;
input [3:0] in1;
input [3:0] in0;
input [7:0] sel; input [7:0] sel_l;
mj_h_mux8 mux_0 (.mx_out(mx_out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_1 (.mx_out(mx_out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_2 (.mx_out(mx_out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_3 (.mx_out(mx_out[3]), .in7(in7[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux2_6 (mx_out, in1, in0, sel, sel_l);
output [5:0] mx_out;
input [5:0] in1;
input [5:0] in0;
input sel ; input sel_l;
mj_h_mux2 mux_0 (.mx_out(mx_out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_1 (.mx_out(mx_out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_2 (.mx_out(mx_out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_3 (.mx_out(mx_out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_4 (.mx_out(mx_out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_5 (.mx_out(mx_out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux3_6 (mx_out, in2, in1, in0, sel, sel_l);
output [5:0] mx_out;
input [5:0] in2;
input [5:0] in1;
input [5:0] in0;
input [2:0] sel; input [2:0] sel_l;
mj_h_mux3 mux_0 (.mx_out(mx_out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_1 (.mx_out(mx_out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_2 (.mx_out(mx_out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_3 (.mx_out(mx_out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_4 (.mx_out(mx_out[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel), .sel_l(sel_l));
mj_h_mux3 mux_5 (.mx_out(mx_out[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux4_6 (mx_out, in3, in2, in1, in0, sel, sel_l);
output [5:0] mx_out;
input [5:0] in3;
input [5:0] in2;
input [5:0] in1;
input [5:0] in0;
input [3:0] sel; input [3:0] sel_l;
mj_h_mux4 mux_0 (.mx_out(mx_out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_1 (.mx_out(mx_out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_2 (.mx_out(mx_out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_3 (.mx_out(mx_out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_4 (.mx_out(mx_out[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel), .sel_l(sel_l));
mj_h_mux4 mux_5 (.mx_out(mx_out[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux6_6 (mx_out, in5, in4, in3, in2, in1, in0, sel, sel_l);
output [5:0] mx_out;
input [5:0] in5;
input [5:0] in4;
input [5:0] in3;
input [5:0] in2;
input [5:0] in1;
input [5:0] in0;
input [5:0] sel; input [5:0] sel_l;
mj_h_mux6 mux_0 (.mx_out(mx_out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_1 (.mx_out(mx_out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_2 (.mx_out(mx_out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_3 (.mx_out(mx_out[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_4 (.mx_out(mx_out[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel), .sel_l(sel_l));
mj_h_mux6 mux_5 (.mx_out(mx_out[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux8_6 (mx_out, in7, in6, in5, in4, in3, in2, in1, in0, sel, sel_l);
output [5:0] mx_out;
input [5:0] in7;
input [5:0] in6;
input [5:0] in5;
input [5:0] in4;
input [5:0] in3;
input [5:0] in2;
input [5:0] in1;
input [5:0] in0;
input [7:0] sel; input [7:0] sel_l;
mj_h_mux8 mux_0 (.mx_out(mx_out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_1 (.mx_out(mx_out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_2 (.mx_out(mx_out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_3 (.mx_out(mx_out[3]), .in7(in7[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_4 (.mx_out(mx_out[4]), .in7(in7[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sel), .sel_l(sel_l));
mj_h_mux8 mux_5 (.mx_out(mx_out[5]), .in7(in7[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sel), .sel_l(sel_l));
endmodule
module mj_h_mux2_8 (mx_out, in1, in0, sel, sel_l);
output [7:0] mx_out;
input [7:0] in1;
input [7:0] in0;
input sel ; input sel_l;
mj_h_mux2 mux_0 (.mx_out(mx_out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_1 (.mx_out(mx_out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel), .sel_l(sel_l));
mj_h_mux2 mux_2 (.mx_out(mx_out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel), .sel_l(sel_l));
| This page: |
Created: | Wed Mar 24 09:44:32 1999 |
| From: |
/import/jet-pj2-sim/rahim/picoJava-II/design/rtl/mj_muxes_behv.v
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