.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_5 (  .mx_out(mx_out[5]), 
    			.in2(in2[5]),	
    			.in1(in1[5]),
    			.in0(in0[5]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_6 (  .mx_out(mx_out[6]), 
    			.in2(in2[6]),	
    			.in1(in1[6]),
    			.in0(in0[6]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_7 (  .mx_out(mx_out[7]), 
    			.in2(in2[7]),	
    			.in1(in1[7]),
    			.in0(in0[7]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_8 (  .mx_out(mx_out[8]), 
    			.in2(in2[8]),	
    			.in1(in1[8]),
    			.in0(in0[8]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_9 (  .mx_out(mx_out[9]), 
    			.in2(in2[9]),	
    			.in1(in1[9]),
    			.in0(in0[9]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_10 (  .mx_out(mx_out[10]), 
    			.in2(in2[10]),	
    			.in1(in1[10]),
    			.in0(in0[10]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_11 (  .mx_out(mx_out[11]), 
    			.in2(in2[11]),	
    			.in1(in1[11]),
    			.in0(in0[11]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_12 (  .mx_out(mx_out[12]), 
    			.in2(in2[12]),	
    			.in1(in1[12]),
    			.in0(in0[12]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_13 (  .mx_out(mx_out[13]), 
    			.in2(in2[13]),	
    			.in1(in1[13]),
    			.in0(in0[13]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_14 (  .mx_out(mx_out[14]), 
    			.in2(in2[14]),	
    			.in1(in1[14]),
    			.in0(in0[14]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_15 (  .mx_out(mx_out[15]), 
    			.in2(in2[15]),	
    			.in1(in1[15]),
    			.in0(in0[15]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux3 mj_p_mux3_16 (  .mx_out(mx_out[16]), 
    			.in2(in2[16]),	
    			.in1(in1[16]),
    			.in0(in0[16]),
    			.sel(sl),
			.sel_l(slb)
			);

endmodule

module mj_s_mux2_d_10 (mx_out, sel, in0, in1);
output [9:0] mx_out;
input        sel;
input  [9:0] in1; 
input  [9:0] in0; 
wire sl;
wire slb;

assign slb = ~sel;
assign sl = ~slb;

mj_p_mux2 mj_p_mux2_0 (  .mx_out(mx_out[0]), 
    			.in1(in1[0]),
    			.in0(in0[0]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux2 mj_p_mux2_1 (  .mx_out(mx_out[1]), 
    			.in1(in1[1]),
    			.in0(in0[1]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux2 mj_p_mux2_2 (  .mx_out(mx_out[2]), 
    			.in1(in1[2]),
    			.in0(in0[2]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux2 mj_p_mux2_3 (  .mx_out(mx_out[3]), 
    			.in1(in1[3]),
    			.in0(in0[3]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux2 mj_p_mux2_4 (  .mx_out(mx_out[4]), 
    			.in1(in1[4]),
    			.in0(in0[4]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux2 mj_p_mux2_5 (  .mx_out(mx_out[5]), 
    			.in1(in1[5]),
    			.in0(in0[5]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux2 mj_p_mux2_6 (  .mx_out(mx_out[6]), 
    			.in1(in1[6]),
    			.in0(in0[6]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux2 mj_p_mux2_7 (  .mx_out(mx_out[7]), 
    			.in1(in1[7]),
    			.in0(in0[7]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux2 mj_p_mux2_8 (  .mx_out(mx_out[8]), 
    			.in1(in1[8]),
    			.in0(in0[8]),
    			.sel(sl),
			.sel_l(slb)
			);

mj_p_mux2 mj_p_mux2_9 (  .mx_out(mx_out[9]), 
    			.in1(in1[9]),
    			.in0(in0[9]),
    			.sel(sl),
			.sel_l(slb)
			);

endmodule




module mux2 (
    out,
    in1,
    in0,
    sel
    );

    output out;
    input in1;
    input in0;
    input [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mj_p_mux2  mux_0 (  .mx_out(out),
                        .in1(in1),
                        .in0(in0),
                        .sel(sl[1]),
                        .sel_l(sl[0])
                        );

endmodule


module mux3 (
    out,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in2;
    input in1;
    input in0;
    input [2:0] sel;
    wire  [2:0] slb;
    wire  [2:0] sl;		

mj_p_muxpri3 mj_p_muxpri3_i0 (.sl(sel),.slb(slb));
assign sl = ~slb;

mj_p_mux3      mux_0 (  .mx_out(out),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel(sl),
                        .sel_l(slb)
                        );

endmodule



module mux4 (
    out,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in3;
    input in2;
    input in1;
    input in0;
    input [3:0] sel;
    wire  [3:0] slb;
    wire  [3:0] sl;		

mj_p_muxpri4 mj_p_muxpri4_i0 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mj_p_mux4  mux_0 (  .mx_out(out),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel(sl),
                        .sel_l(slb)
                        );

endmodule



module mux5 (
    out,
    in4,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in4;
    input in3;
    input in2;
    input in1;
    input in0;
    input [4:0] sel;
    wire  [5:0] slb;
    wire  [5:0] sl;		

mj_p_muxpri6 mj_p_muxpri6_i0 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;


    mj_p_mux6  mux_0 (  .mx_out(out),
                        .in5(1'b0),
                        .in4(in4),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel({1'b0,sl[4:0]}),
                        .sel_l({1'b1,slb[4:0]})
                        );

endmodule



module mux6 (
    out,
    in5,
    in4,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in5;
    input in4;
    input in3;
    input in2;
    input in1;
    input in0;
    input [5:0] sel;
    wire  [5:0] slb;
    wire  [5:0] sl;		

mj_p_muxpri6 mj_p_muxpri6_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mj_p_mux6  mux_0 (  .mx_out(out),
                        .in5(in5),
                        .in4(in4),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel(sl),
                        .sel_l(slb)
                        );

endmodule


module mux7 (
    out,
    in6,
    in5,
    in4,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in6;
    input in5;
    input in4;
    input in3;
    input in2;
    input in1;
    input in0;
    input [6:0] sel;
    wire  [7:0] slb;
    wire  [7:0] sl;		

mj_p_muxpri8 mj_p_muxpri8_i0 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;


    mj_p_mux8  mux_0 (  .mx_out(out),
                        .in7(1'b0),
                        .in6(in6),
                        .in5(in5),
                        .in4(in4),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel({1'b0,sl[6:0]}),
                        .sel_l({1'b1,slb[6:0]})
                        );


endmodule



module mux8 (
    out,
    in7,
    in6,
    in5,
    in4,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in7;
    input in6;
    input in5;
    input in4;
    input in3;
    input in2;
    input in1;
    input in0;
    input [7:0] sel;
    wire  [7:0] slb;
    wire  [7:0] sl;	

mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mj_p_mux8  mux_0 (  .mx_out(out),
                        .in7(in7),
                        .in6(in6),
                        .in5(in5),
                        .in4(in4),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel(sl),
                        .sel_l(slb)
                        );

endmodule



... (truncated)
module mux2p (
    out,
    in1,
    in0,
    sel
    );

    output out;
    input in1;
    input in0;
    input [1:0] sel;

    mj_p_mux2  mux_0 (  .mx_out(out),
                        .in1(in1),
                        .in0(in0),
                        .sel(sel[1]),
                        .sel_l(sel[0])
                        );

endmodule


... (truncated)
module mux3p (
    out,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in2;
    input in1;
    input in0;
    input [2:0] sel;

    mj_p_mux3  mux_0 (  .mx_out(out),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel(sel),
                        .sel_l(~sel)
                        );

endmodule


... (truncated)
module mux4p (
    out,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in3;
    input in2;
    input in1;
    input in0;
    input [3:0] sel;

    mj_p_mux4  mux_0 (  .mx_out(out),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel(sel),
                        .sel_l(~sel)
                        );

endmodule


... (truncated)
module mux5p (
    out,
    in4,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in4;
    input in3;
    input in2;
    input in1;
    input in0;
    input [4:0] sel;

    mj_p_mux6  mux_0 (  .mx_out(out),
                        .in5(1'b0),
                        .in4(in4),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel({1'b0,sel}),
                        .sel_l(~{1'b0,sel})
                        );

endmodule


... (truncated)
module mux6p (
    out,
    in5,
    in4,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in5;
    input in4;
    input in3;
    input in2;
    input in1;
    input in0;
    input [5:0] sel;

    mj_p_mux6  mux_0 (  .mx_out(out),
                        .in5(in5),
                        .in4(in4),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel(sel),
                        .sel_l(~sel)
                        );

endmodule


... (truncated)
module mux7p (
    out,
    in6,
    in5,
    in4,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in6;
    input in5;
    input in4;
    input in3;
    input in2;
    input in1;
    input in0;
    input [6:0] sel;

    mj_p_mux8  mux_0 (  .mx_out(out),
                        .in7(1'b0),
                        .in6(in6),
                        .in5(in5),
                        .in4(in4),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel({1'b0,sel}),
                        .sel_l(~{1'b0,sel})
                        );


endmodule


... (truncated)
module mux8p (
    out,
    in7,
    in6,
    in5,
    in4,
    in3,
    in2,
    in1,
    in0,
    sel
    );

    output out;
    input in7;
    input in6;
    input in5;
    input in4;
    input in3;
    input in2;
    input in1;
    input in0;
    input [7:0] sel;

    mj_p_mux8  mux_0 (  .mx_out(out),
                        .in7(in7),
                        .in6(in6),
                        .in5(in5),
                        .in4(in4),
                        .in3(in3),
                        .in2(in2),
                        .in1(in1),
                        .in0(in0),
                        .sel(sel),
                        .sel_l(~sel)
                        );

endmodule


module mux2_2 (out, in1, in0, sel);
    output [1:0] out;
    input  [1:0] in1; 
    input  [1:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));

endmodule 


module mux3_2 (out, in2, in1, in0, sel);
    output [1:0] out;
    input  [1:0] in2; 
    input  [1:0] in1; 
    input  [1:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));

endmodule 


module mux4_2 (out, in3, in2, in1, in0, sel);
    output [1:0] out;
    input  [1:0] in3; 
    input  [1:0] in2; 
    input  [1:0] in1; 
    input  [1:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));

endmodule 


module mux5_2 (out, in4, in3, in2, in1, in0, sel);
    output [1:0] out;
    input  [1:0] in4; 
    input  [1:0] in3; 
    input  [1:0] in2; 
    input  [1:0] in1; 
    input  [1:0] in0; 
    input  [4:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;

    mux5p  mux_0 (.out(out[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl[4:0]));
    mux5p  mux_1 (.out(out[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl[4:0]));

endmodule 


module mux6_2 (out, in5, in4, in3, in2, in1, in0, sel);
    output [1:0] out;
    input  [1:0] in5; 
    input  [1:0] in4; 
    input  [1:0] in3; 
    input  [1:0] in2; 
    input  [1:0] in1; 
    input  [1:0] in0; 
    input  [5:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux6p  mux_0 (.out(out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux6p  mux_1 (.out(out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));

endmodule 


module mux7_2 (out, in6, in5, in4, in3, in2, in1, in0, sel);
    output [1:0] out;
    input  [1:0] in6; 
    input  [1:0] in5; 
    input  [1:0] in4; 
    input  [1:0] in3; 
    input  [1:0] in2; 
    input  [1:0] in1; 
    input  [1:0] in0; 
    input  [6:0] sel;

    mux7p  mux_0 (.out(out[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel));
    mux7p  mux_1 (.out(out[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel));

endmodule 


module mux8_2 (out, in7, in6, in5, in4, in3, in2, in1, in0, sel);
    output [1:0] out;
    input  [1:0] in7; 
    input  [1:0] in6; 
    input  [1:0] in5; 
    input  [1:0] in4; 
    input  [1:0] in3; 
    input  [1:0] in2; 
    input  [1:0] in1; 
    input  [1:0] in0; 
    input  [7:0] sel;
wire  [7:0] slb;
wire  [7:0] sl;
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux8p  mux_0 (.out(out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux8p  mux_1 (.out(out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));

endmodule 


module mux2_3 (out, in1, in0, sel);
    output [2:0] out;
    input  [2:0] in1; 
    input  [2:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));

endmodule 


module mux3_3 (out, in2, in1, in0, sel);
    output [2:0] out;
    input  [2:0] in2; 
    input  [2:0] in1; 
    input  [2:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux3p  mux_2 (.out(out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));

endmodule 


module mux4_3 (out, in3, in2, in1, in0, sel);
    output [2:0] out;
    input  [2:0] in3; 
    input  [2:0] in2; 
    input  [2:0] in1; 
    input  [2:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux4p  mux_2 (.out(out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));

endmodule 



module mux5_3 (out, in4, in3, in2, in1, in0, sel);
    output [2:0] out;
    input  [2:0] in4; 
    input  [2:0] in3; 
    input  [2:0] in2; 
    input  [2:0] in1; 
    input  [2:0] in0; 
    input  [4:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;

    mux5p  mux_0 (.out(out[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl[4:0]));
    mux5p  mux_1 (.out(out[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl[4:0]));
    mux5p  mux_2 (.out(out[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl[4:0]));

endmodule 


module mux6_3 (out, in5, in4, in3, in2, in1, in0, sel);
    output [2:0] out;
    input  [2:0] in5; 
    input  [2:0] in4; 
    input  [2:0] in3; 
    input  [2:0] in2; 
    input  [2:0] in1; 
    input  [2:0] in0; 
    input  [5:0] sel;
wire  [5:0] slb;
wire  [5:0] sl;
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux6p  mux_0 (.out(out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux6p  mux_1 (.out(out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux6p  mux_2 (.out(out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));

endmodule 


module mux7_3 (out, in6, in5, in4, in3, in2, in1, in0, sel);
    output [2:0] out;
    input  [2:0] in6; 
    input  [2:0] in5; 
    input  [2:0] in4; 
    input  [2:0] in3; 
    input  [2:0] in2; 
    input  [2:0] in1; 
    input  [2:0] in0; 
    input  [6:0] sel;

    mux7p  mux_0 (.out(out[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sel));
    mux7p  mux_1 (.out(out[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sel));
    mux7p  mux_2 (.out(out[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sel));

endmodule 


module mux8_3 (out, in7, in6, in5, in4, in3, in2, in1, in0, sel);
    output [2:0] out;
    input  [2:0] in7; 
    input  [2:0] in6; 
    input  [2:0] in5; 
    input  [2:0] in4; 
    input  [2:0] in3; 
    input  [2:0] in2; 
    input  [2:0] in1; 
    input  [2:0] in0; 
    input  [7:0] sel;
wire  [7:0] slb;
wire  [7:0] sl;
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux8p  mux_0 (.out(out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux8p  mux_1 (.out(out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux8p  mux_2 (.out(out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));

endmodule 



module mux2_4 (out, in1, in0, sel);
    output [3:0] out;
    input  [3:0] in1; 
    input  [3:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));

endmodule 


module mux3_4 (out, in2, in1, in0, sel);
    output [3:0] out;
    input  [3:0] in2; 
    input  [3:0] in1; 
    input  [3:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux3p  mux_2 (.out(out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux3p  mux_3 (.out(out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));

endmodule 


module mux4_4 (out, in3, in2, in1, in0, sel);
    output [3:0] out;
    input  [3:0] in3; 
    input  [3:0] in2; 
    input  [3:0] in1; 
    input  [3:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux4p  mux_2 (.out(out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux4p  mux_3 (.out(out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));

endmodule 


module mux5_4 (out, in4, in3, in2, in1, in0, sel);
    output [3:0] out;
    input  [3:0] in4; 
    input  [3:0] in3; 
    input  [3:0] in2; 
    input  [3:0] in1; 
    input  [3:0] in0;