mux2p  mux_22 (.out(out[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux2p  mux_23 (.out(out[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux2p  mux_24 (.out(out[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux2p  mux_25 (.out(out[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux2p  mux_26 (.out(out[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux2p  mux_27 (.out(out[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux2p  mux_28 (.out(out[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));
    mux2p  mux_29 (.out(out[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl));

endmodule 



module mux3_30 (out, in2, in1, in0, sel);
    output [29:0] out;
    input  [29:0] in2; 
    input  [29:0] in1; 
    input  [29:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;	
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux3p  mux_2 (.out(out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux3p  mux_3 (.out(out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux3p  mux_4 (.out(out[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux3p  mux_5 (.out(out[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux3p  mux_6 (.out(out[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux3p  mux_7 (.out(out[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux3p  mux_8 (.out(out[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux3p  mux_9 (.out(out[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux3p  mux_10 (.out(out[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux3p  mux_11 (.out(out[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux3p  mux_12 (.out(out[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux3p  mux_13 (.out(out[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux3p  mux_14 (.out(out[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux3p  mux_15 (.out(out[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux3p  mux_16 (.out(out[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux3p  mux_17 (.out(out[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux3p  mux_18 (.out(out[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux3p  mux_19 (.out(out[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux3p  mux_20 (.out(out[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux3p  mux_21 (.out(out[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux3p  mux_22 (.out(out[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux3p  mux_23 (.out(out[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux3p  mux_24 (.out(out[24]), .in2(in2[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux3p  mux_25 (.out(out[25]), .in2(in2[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux3p  mux_26 (.out(out[26]), .in2(in2[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux3p  mux_27 (.out(out[27]), .in2(in2[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux3p  mux_28 (.out(out[28]), .in2(in2[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));
    mux3p  mux_29 (.out(out[29]), .in2(in2[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl));

endmodule 


module mux4_30 (out, in3, in2, in1, in0, sel);
    output [29:0] out;
    input  [29:0] in3; 
    input  [29:0] in2; 
    input  [29:0] in1; 
    input  [29:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;	
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux4p  mux_2 (.out(out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux4p  mux_3 (.out(out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux4p  mux_4 (.out(out[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux4p  mux_5 (.out(out[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux4p  mux_6 (.out(out[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux4p  mux_7 (.out(out[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux4p  mux_8 (.out(out[8]), .in3(in3[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux4p  mux_9 (.out(out[9]), .in3(in3[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux4p  mux_10 (.out(out[10]), .in3(in3[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux4p  mux_11 (.out(out[11]), .in3(in3[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux4p  mux_12 (.out(out[12]), .in3(in3[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux4p  mux_13 (.out(out[13]), .in3(in3[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux4p  mux_14 (.out(out[14]), .in3(in3[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux4p  mux_15 (.out(out[15]), .in3(in3[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux4p  mux_16 (.out(out[16]), .in3(in3[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux4p  mux_17 (.out(out[17]), .in3(in3[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux4p  mux_18 (.out(out[18]), .in3(in3[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux4p  mux_19 (.out(out[19]), .in3(in3[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux4p  mux_20 (.out(out[20]), .in3(in3[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux4p  mux_21 (.out(out[21]), .in3(in3[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux4p  mux_22 (.out(out[22]), .in3(in3[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux4p  mux_23 (.out(out[23]), .in3(in3[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux4p  mux_24 (.out(out[24]), .in3(in3[24]), .in2(in2[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux4p  mux_25 (.out(out[25]), .in3(in3[25]), .in2(in2[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux4p  mux_26 (.out(out[26]), .in3(in3[26]), .in2(in2[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux4p  mux_27 (.out(out[27]), .in3(in3[27]), .in2(in2[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux4p  mux_28 (.out(out[28]), .in3(in3[28]), .in2(in2[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));
    mux4p  mux_29 (.out(out[29]), .in3(in3[29]), .in2(in2[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl));

endmodule 

... (truncated)
module mux2_32 (out, in1, in0, sel);
    output [31:0] out;
    input  [31:0] in1; 
    input  [31:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;
    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux2p  mux_5 (.out(out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux2p  mux_6 (.out(out[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux2p  mux_7 (.out(out[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux2p  mux_8 (.out(out[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux2p  mux_9 (.out(out[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux2p  mux_10 (.out(out[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux2p  mux_11 (.out(out[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux2p  mux_12 (.out(out[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux2p  mux_13 (.out(out[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux2p  mux_14 (.out(out[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux2p  mux_15 (.out(out[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux2p  mux_16 (.out(out[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux2p  mux_17 (.out(out[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux2p  mux_18 (.out(out[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux2p  mux_19 (.out(out[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux2p  mux_20 (.out(out[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux2p  mux_21 (.out(out[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux2p  mux_22 (.out(out[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux2p  mux_23 (.out(out[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux2p  mux_24 (.out(out[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux2p  mux_25 (.out(out[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux2p  mux_26 (.out(out[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux2p  mux_27 (.out(out[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux2p  mux_28 (.out(out[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));
    mux2p  mux_29 (.out(out[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl));
    mux2p  mux_30 (.out(out[30]), .in1(in1[30]), .in0(in0[30]), .sel(sl));
    mux2p  mux_31 (.out(out[31]), .in1(in1[31]), .in0(in0[31]), .sel(sl));

endmodule 



module mux3_32 (out, in2, in1, in0, sel);
    output [31:0] out;
    input  [31:0] in2; 
    input  [31:0] in1; 
    input  [31:0] in0; 
    input  [2:0] sel;
wire  [2:0] slb;
wire  [2:0] sl;	
mj_p_muxpri3 mj_p_muxpri3_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux3p  mux_0 (.out(out[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux3p  mux_1 (.out(out[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux3p  mux_2 (.out(out[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux3p  mux_3 (.out(out[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux3p  mux_4 (.out(out[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux3p  mux_5 (.out(out[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux3p  mux_6 (.out(out[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux3p  mux_7 (.out(out[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux3p  mux_8 (.out(out[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux3p  mux_9 (.out(out[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux3p  mux_10 (.out(out[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux3p  mux_11 (.out(out[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux3p  mux_12 (.out(out[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux3p  mux_13 (.out(out[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux3p  mux_14 (.out(out[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux3p  mux_15 (.out(out[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux3p  mux_16 (.out(out[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux3p  mux_17 (.out(out[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux3p  mux_18 (.out(out[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux3p  mux_19 (.out(out[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux3p  mux_20 (.out(out[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux3p  mux_21 (.out(out[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux3p  mux_22 (.out(out[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux3p  mux_23 (.out(out[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux3p  mux_24 (.out(out[24]), .in2(in2[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux3p  mux_25 (.out(out[25]), .in2(in2[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux3p  mux_26 (.out(out[26]), .in2(in2[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux3p  mux_27 (.out(out[27]), .in2(in2[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux3p  mux_28 (.out(out[28]), .in2(in2[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));
    mux3p  mux_29 (.out(out[29]), .in2(in2[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl));
    mux3p  mux_30 (.out(out[30]), .in2(in2[30]), .in1(in1[30]), .in0(in0[30]), .sel(sl));
    mux3p  mux_31 (.out(out[31]), .in2(in2[31]), .in1(in1[31]), .in0(in0[31]), .sel(sl));

endmodule 



module mux4_32 (out, in3, in2, in1, in0, sel);
    output [31:0] out;
    input  [31:0] in3; 
    input  [31:0] in2; 
    input  [31:0] in1; 
    input  [31:0] in0; 
    input  [3:0] sel;
wire  [3:0] slb;
wire  [3:0] sl;	
mj_p_muxpri4 mj_p_muxpri4_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux4p  mux_0 (.out(out[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux4p  mux_1 (.out(out[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux4p  mux_2 (.out(out[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux4p  mux_3 (.out(out[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux4p  mux_4 (.out(out[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux4p  mux_5 (.out(out[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux4p  mux_6 (.out(out[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux4p  mux_7 (.out(out[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux4p  mux_8 (.out(out[8]), .in3(in3[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux4p  mux_9 (.out(out[9]), .in3(in3[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux4p  mux_10 (.out(out[10]), .in3(in3[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux4p  mux_11 (.out(out[11]), .in3(in3[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux4p  mux_12 (.out(out[12]), .in3(in3[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux4p  mux_13 (.out(out[13]), .in3(in3[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux4p  mux_14 (.out(out[14]), .in3(in3[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux4p  mux_15 (.out(out[15]), .in3(in3[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux4p  mux_16 (.out(out[16]), .in3(in3[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux4p  mux_17 (.out(out[17]), .in3(in3[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux4p  mux_18 (.out(out[18]), .in3(in3[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux4p  mux_19 (.out(out[19]), .in3(in3[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux4p  mux_20 (.out(out[20]), .in3(in3[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux4p  mux_21 (.out(out[21]), .in3(in3[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux4p  mux_22 (.out(out[22]), .in3(in3[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux4p  mux_23 (.out(out[23]), .in3(in3[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux4p  mux_24 (.out(out[24]), .in3(in3[24]), .in2(in2[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux4p  mux_25 (.out(out[25]), .in3(in3[25]), .in2(in2[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux4p  mux_26 (.out(out[26]), .in3(in3[26]), .in2(in2[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux4p  mux_27 (.out(out[27]), .in3(in3[27]), .in2(in2[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux4p  mux_28 (.out(out[28]), .in3(in3[28]), .in2(in2[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));
    mux4p  mux_29 (.out(out[29]), .in3(in3[29]), .in2(in2[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl));
    mux4p  mux_30 (.out(out[30]), .in3(in3[30]), .in2(in2[30]), .in1(in1[30]), .in0(in0[30]), .sel(sl));
    mux4p  mux_31 (.out(out[31]), .in3(in3[31]), .in2(in2[31]), .in1(in1[31]), .in0(in0[31]), .sel(sl));

endmodule 



module mux5_32 (out, in4, in3, in2, in1, in0, sel);
    output [31:0] out;
    input  [31:0] in4; 
    input  [31:0] in3; 
    input  [31:0] in2; 
    input  [31:0] in1; 
    input  [31:0] in0; 
    input  [4:0] sel;

wire  [5:0] slb;
wire  [5:0] sl;	
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;


    mux5p  mux_0 (.out(out[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl[4:0]));
    mux5p  mux_1 (.out(out[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl[4:0]));
    mux5p  mux_2 (.out(out[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl[4:0]));
    mux5p  mux_3 (.out(out[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl[4:0]));
    mux5p  mux_4 (.out(out[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl[4:0]));
    mux5p  mux_5 (.out(out[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl[4:0]));
    mux5p  mux_6 (.out(out[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl[4:0]));
    mux5p  mux_7 (.out(out[7]), .in4(in4[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl[4:0]));
    mux5p  mux_8 (.out(out[8]), .in4(in4[8]), .in3(in3[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl[4:0]));
    mux5p  mux_9 (.out(out[9]), .in4(in4[9]), .in3(in3[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl[4:0]));
    mux5p  mux_10 (.out(out[10]), .in4(in4[10]), .in3(in3[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl[4:0]));
    mux5p  mux_11 (.out(out[11]), .in4(in4[11]), .in3(in3[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl[4:0]));
    mux5p  mux_12 (.out(out[12]), .in4(in4[12]), .in3(in3[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl[4:0]));
    mux5p  mux_13 (.out(out[13]), .in4(in4[13]), .in3(in3[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl[4:0]));
    mux5p  mux_14 (.out(out[14]), .in4(in4[14]), .in3(in3[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl[4:0]));
    mux5p  mux_15 (.out(out[15]), .in4(in4[15]), .in3(in3[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl[4:0]));
    mux5p  mux_16 (.out(out[16]), .in4(in4[16]), .in3(in3[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl[4:0]));
    mux5p  mux_17 (.out(out[17]), .in4(in4[17]), .in3(in3[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl[4:0]));
    mux5p  mux_18 (.out(out[18]), .in4(in4[18]), .in3(in3[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl[4:0]));
    mux5p  mux_19 (.out(out[19]), .in4(in4[19]), .in3(in3[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl[4:0]));
    mux5p  mux_20 (.out(out[20]), .in4(in4[20]), .in3(in3[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl[4:0]));
    mux5p  mux_21 (.out(out[21]), .in4(in4[21]), .in3(in3[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl[4:0]));
    mux5p  mux_22 (.out(out[22]), .in4(in4[22]), .in3(in3[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl[4:0]));
    mux5p  mux_23 (.out(out[23]), .in4(in4[23]), .in3(in3[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl[4:0]));
    mux5p  mux_24 (.out(out[24]), .in4(in4[24]), .in3(in3[24]), .in2(in2[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl[4:0]));
    mux5p  mux_25 (.out(out[25]), .in4(in4[25]), .in3(in3[25]), .in2(in2[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl[4:0]));
    mux5p  mux_26 (.out(out[26]), .in4(in4[26]), .in3(in3[26]), .in2(in2[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl[4:0]));
    mux5p  mux_27 (.out(out[27]), .in4(in4[27]), .in3(in3[27]), .in2(in2[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl[4:0]));
    mux5p  mux_28 (.out(out[28]), .in4(in4[28]), .in3(in3[28]), .in2(in2[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl[4:0]));
    mux5p  mux_29 (.out(out[29]), .in4(in4[29]), .in3(in3[29]), .in2(in2[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl[4:0]));
    mux5p  mux_30 (.out(out[30]), .in4(in4[30]), .in3(in3[30]), .in2(in2[30]), .in1(in1[30]), .in0(in0[30]), .sel(sl[4:0]));
    mux5p  mux_31 (.out(out[31]), .in4(in4[31]), .in3(in3[31]), .in2(in2[31]), .in1(in1[31]), .in0(in0[31]), .sel(sl[4:0]));

endmodule 



module mux6_32 (out, in5, in4, in3, in2, in1, in0, sel);
    output [31:0] out;
    input  [31:0] in5; 
    input  [31:0] in4; 
    input  [31:0] in3; 
    input  [31:0] in2; 
    input  [31:0] in1; 
    input  [31:0] in0; 
    input  [5:0] sel;

wire  [5:0] slb;
wire  [5:0] sl;	
mj_p_muxpri6 mj_p_muxpri6_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;


    mux6p  mux_0 (.out(out[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux6p  mux_1 (.out(out[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux6p  mux_2 (.out(out[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux6p  mux_3 (.out(out[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux6p  mux_4 (.out(out[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux6p  mux_5 (.out(out[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux6p  mux_6 (.out(out[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux6p  mux_7 (.out(out[7]), .in5(in5[7]), .in4(in4[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux6p  mux_8 (.out(out[8]), .in5(in5[8]), .in4(in4[8]), .in3(in3[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux6p  mux_9 (.out(out[9]), .in5(in5[9]), .in4(in4[9]), .in3(in3[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux6p  mux_10 (.out(out[10]), .in5(in5[10]), .in4(in4[10]), .in3(in3[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux6p  mux_11 (.out(out[11]), .in5(in5[11]), .in4(in4[11]), .in3(in3[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux6p  mux_12 (.out(out[12]), .in5(in5[12]), .in4(in4[12]), .in3(in3[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux6p  mux_13 (.out(out[13]), .in5(in5[13]), .in4(in4[13]), .in3(in3[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux6p  mux_14 (.out(out[14]), .in5(in5[14]), .in4(in4[14]), .in3(in3[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux6p  mux_15 (.out(out[15]), .in5(in5[15]), .in4(in4[15]), .in3(in3[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux6p  mux_16 (.out(out[16]), .in5(in5[16]), .in4(in4[16]), .in3(in3[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux6p  mux_17 (.out(out[17]), .in5(in5[17]), .in4(in4[17]), .in3(in3[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux6p  mux_18 (.out(out[18]), .in5(in5[18]), .in4(in4[18]), .in3(in3[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux6p  mux_19 (.out(out[19]), .in5(in5[19]), .in4(in4[19]), .in3(in3[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux6p  mux_20 (.out(out[20]), .in5(in5[20]), .in4(in4[20]), .in3(in3[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux6p  mux_21 (.out(out[21]), .in5(in5[21]), .in4(in4[21]), .in3(in3[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux6p  mux_22 (.out(out[22]), .in5(in5[22]), .in4(in4[22]), .in3(in3[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux6p  mux_23 (.out(out[23]), .in5(in5[23]), .in4(in4[23]), .in3(in3[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux6p  mux_24 (.out(out[24]), .in5(in5[24]), .in4(in4[24]), .in3(in3[24]), .in2(in2[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux6p  mux_25 (.out(out[25]), .in5(in5[25]), .in4(in4[25]), .in3(in3[25]), .in2(in2[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux6p  mux_26 (.out(out[26]), .in5(in5[26]), .in4(in4[26]), .in3(in3[26]), .in2(in2[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux6p  mux_27 (.out(out[27]), .in5(in5[27]), .in4(in4[27]), .in3(in3[27]), .in2(in2[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux6p  mux_28 (.out(out[28]), .in5(in5[28]), .in4(in4[28]), .in3(in3[28]), .in2(in2[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));
    mux6p  mux_29 (.out(out[29]), .in5(in5[29]), .in4(in4[29]), .in3(in3[29]), .in2(in2[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl));
    mux6p  mux_30 (.out(out[30]), .in5(in5[30]), .in4(in4[30]), .in3(in3[30]), .in2(in2[30]), .in1(in1[30]), .in0(in0[30]), .sel(sl));
    mux6p  mux_31 (.out(out[31]), .in5(in5[31]), .in4(in4[31]), .in3(in3[31]), .in2(in2[31]), .in1(in1[31]), .in0(in0[31]), .sel(sl));

endmodule 



module mux7_32 (out, in6, in5, in4, in3, in2, in1, in0, sel);
    output [31:0] out;
    input  [31:0] in6; 
    input  [31:0] in5; 
    input  [31:0] in4; 
    input  [31:0] in3; 
    input  [31:0] in2; 
    input  [31:0] in1; 
    input  [31:0] in0; 
    input  [6:0] sel;

wire  [7:0] slb;
wire  [7:0] sl;	
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl({1'b0,sel}),.slb(slb));
assign sl = ~slb;

    mux7p  mux_0 (.out(out[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl[6:0]));
    mux7p  mux_1 (.out(out[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl[6:0]));
    mux7p  mux_2 (.out(out[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl[6:0]));
    mux7p  mux_3 (.out(out[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl[6:0]));
    mux7p  mux_4 (.out(out[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl[6:0]));
    mux7p  mux_5 (.out(out[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl[6:0]));
    mux7p  mux_6 (.out(out[6]), .in6(in6[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl[6:0]));
    mux7p  mux_7 (.out(out[7]), .in6(in6[7]), .in5(in5[7]), .in4(in4[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl[6:0]));
    mux7p  mux_8 (.out(out[8]), .in6(in6[8]), .in5(in5[8]), .in4(in4[8]), .in3(in3[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl[6:0]));
    mux7p  mux_9 (.out(out[9]), .in6(in6[9]), .in5(in5[9]), .in4(in4[9]), .in3(in3[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl[6:0]));
    mux7p  mux_10 (.out(out[10]), .in6(in6[10]), .in5(in5[10]), .in4(in4[10]), .in3(in3[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl[6:0]));
    mux7p  mux_11 (.out(out[11]), .in6(in6[11]), .in5(in5[11]), .in4(in4[11]), .in3(in3[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl[6:0]));
    mux7p  mux_12 (.out(out[12]), .in6(in6[12]), .in5(in5[12]), .in4(in4[12]), .in3(in3[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl[6:0]));
    mux7p  mux_13 (.out(out[13]), .in6(in6[13]), .in5(in5[13]), .in4(in4[13]), .in3(in3[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl[6:0]));
    mux7p  mux_14 (.out(out[14]), .in6(in6[14]), .in5(in5[14]), .in4(in4[14]), .in3(in3[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl[6:0]));
    mux7p  mux_15 (.out(out[15]), .in6(in6[15]), .in5(in5[15]), .in4(in4[15]), .in3(in3[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl[6:0]));
    mux7p  mux_16 (.out(out[16]), .in6(in6[16]), .in5(in5[16]), .in4(in4[16]), .in3(in3[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl[6:0]));
    mux7p  mux_17 (.out(out[17]), .in6(in6[17]), .in5(in5[17]), .in4(in4[17]), .in3(in3[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl[6:0]));
    mux7p  mux_18 (.out(out[18]), .in6(in6[18]), .in5(in5[18]), .in4(in4[18]), .in3(in3[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl[6:0]));
    mux7p  mux_19 (.out(out[19]), .in6(in6[19]), .in5(in5[19]), .in4(in4[19]), .in3(in3[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl[6:0]));
    mux7p  mux_20 (.out(out[20]), .in6(in6[20]), .in5(in5[20]), .in4(in4[20]), .in3(in3[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl[6:0]));
    mux7p  mux_21 (.out(out[21]), .in6(in6[21]), .in5(in5[21]), .in4(in4[21]), .in3(in3[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl[6:0]));
    mux7p  mux_22 (.out(out[22]), .in6(in6[22]), .in5(in5[22]), .in4(in4[22]), .in3(in3[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl[6:0]));
    mux7p  mux_23 (.out(out[23]), .in6(in6[23]), .in5(in5[23]), .in4(in4[23]), .in3(in3[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl[6:0]));
    mux7p  mux_24 (.out(out[24]), .in6(in6[24]), .in5(in5[24]), .in4(in4[24]), .in3(in3[24]), .in2(in2[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl[6:0]));
    mux7p  mux_25 (.out(out[25]), .in6(in6[25]), .in5(in5[25]), .in4(in4[25]), .in3(in3[25]), .in2(in2[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl[6:0]));
    mux7p  mux_26 (.out(out[26]), .in6(in6[26]), .in5(in5[26]), .in4(in4[26]), .in3(in3[26]), .in2(in2[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl[6:0]));
    mux7p  mux_27 (.out(out[27]), .in6(in6[27]), .in5(in5[27]), .in4(in4[27]), .in3(in3[27]), .in2(in2[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl[6:0]));
    mux7p  mux_28 (.out(out[28]), .in6(in6[28]), .in5(in5[28]), .in4(in4[28]), .in3(in3[28]), .in2(in2[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl[6:0]));
    mux7p  mux_29 (.out(out[29]), .in6(in6[29]), .in5(in5[29]), .in4(in4[29]), .in3(in3[29]), .in2(in2[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl[6:0]));
    mux7p  mux_30 (.out(out[30]), .in6(in6[30]), .in5(in5[30]), .in4(in4[30]), .in3(in3[30]), .in2(in2[30]), .in1(in1[30]), .in0(in0[30]), .sel(sl[6:0]));
    mux7p  mux_31 (.out(out[31]), .in6(in6[31]), .in5(in5[31]), .in4(in4[31]), .in3(in3[31]), .in2(in2[31]), .in1(in1[31]), .in0(in0[31]), .sel(sl[6:0]));

endmodule 



module mux8_32 (out, in7, in6, in5, in4, in3, in2, in1, in0, sel);
    output [31:0] out;
    input  [31:0] in7; 
    input  [31:0] in6; 
    input  [31:0] in5; 
    input  [31:0] in4; 
    input  [31:0] in3; 
    input  [31:0] in2; 
    input  [31:0] in1; 
    input  [31:0] in0; 
    input  [7:0] sel;
    
wire  [7:0] slb;
wire  [7:0] sl;	
mj_p_muxpri8 mj_p_muxpri8_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux8p  mux_0 (.out(out[0]), .in7(in7[0]), .in6(in6[0]), .in5(in5[0]), .in4(in4[0]), .in3(in3[0]), .in2(in2[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux8p  mux_1 (.out(out[1]), .in7(in7[1]), .in6(in6[1]), .in5(in5[1]), .in4(in4[1]), .in3(in3[1]), .in2(in2[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux8p  mux_2 (.out(out[2]), .in7(in7[2]), .in6(in6[2]), .in5(in5[2]), .in4(in4[2]), .in3(in3[2]), .in2(in2[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux8p  mux_3 (.out(out[3]), .in7(in7[3]), .in6(in6[3]), .in5(in5[3]), .in4(in4[3]), .in3(in3[3]), .in2(in2[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux8p  mux_4 (.out(out[4]), .in7(in7[4]), .in6(in6[4]), .in5(in5[4]), .in4(in4[4]), .in3(in3[4]), .in2(in2[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux8p  mux_5 (.out(out[5]), .in7(in7[5]), .in6(in6[5]), .in5(in5[5]), .in4(in4[5]), .in3(in3[5]), .in2(in2[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux8p  mux_6 (.out(out[6]), .in7(in7[6]), .in6(in6[6]), .in5(in5[6]), .in4(in4[6]), .in3(in3[6]), .in2(in2[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux8p  mux_7 (.out(out[7]), .in7(in7[7]), .in6(in6[7]), .in5(in5[7]), .in4(in4[7]), .in3(in3[7]), .in2(in2[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux8p  mux_8 (.out(out[8]), .in7(in7[8]), .in6(in6[8]), .in5(in5[8]), .in4(in4[8]), .in3(in3[8]), .in2(in2[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux8p  mux_9 (.out(out[9]), .in7(in7[9]), .in6(in6[9]), .in5(in5[9]), .in4(in4[9]), .in3(in3[9]), .in2(in2[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux8p  mux_10 (.out(out[10]), .in7(in7[10]), .in6(in6[10]), .in5(in5[10]), .in4(in4[10]), .in3(in3[10]), .in2(in2[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux8p  mux_11 (.out(out[11]), .in7(in7[11]), .in6(in6[11]), .in5(in5[11]), .in4(in4[11]), .in3(in3[11]), .in2(in2[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux8p  mux_12 (.out(out[12]), .in7(in7[12]), .in6(in6[12]), .in5(in5[12]), .in4(in4[12]), .in3(in3[12]), .in2(in2[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux8p  mux_13 (.out(out[13]), .in7(in7[13]), .in6(in6[13]), .in5(in5[13]), .in4(in4[13]), .in3(in3[13]), .in2(in2[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux8p  mux_14 (.out(out[14]), .in7(in7[14]), .in6(in6[14]), .in5(in5[14]), .in4(in4[14]), .in3(in3[14]), .in2(in2[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux8p  mux_15 (.out(out[15]), .in7(in7[15]), .in6(in6[15]), .in5(in5[15]), .in4(in4[15]), .in3(in3[15]), .in2(in2[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux8p  mux_16 (.out(out[16]), .in7(in7[16]), .in6(in6[16]), .in5(in5[16]), .in4(in4[16]), .in3(in3[16]), .in2(in2[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux8p  mux_17 (.out(out[17]), .in7(in7[17]), .in6(in6[17]), .in5(in5[17]), .in4(in4[17]), .in3(in3[17]), .in2(in2[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux8p  mux_18 (.out(out[18]), .in7(in7[18]), .in6(in6[18]), .in5(in5[18]), .in4(in4[18]), .in3(in3[18]), .in2(in2[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux8p  mux_19 (.out(out[19]), .in7(in7[19]), .in6(in6[19]), .in5(in5[19]), .in4(in4[19]), .in3(in3[19]), .in2(in2[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux8p  mux_20 (.out(out[20]), .in7(in7[20]), .in6(in6[20]), .in5(in5[20]), .in4(in4[20]), .in3(in3[20]), .in2(in2[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux8p  mux_21 (.out(out[21]), .in7(in7[21]), .in6(in6[21]), .in5(in5[21]), .in4(in4[21]), .in3(in3[21]), .in2(in2[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux8p  mux_22 (.out(out[22]), .in7(in7[22]), .in6(in6[22]), .in5(in5[22]), .in4(in4[22]), .in3(in3[22]), .in2(in2[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux8p  mux_23 (.out(out[23]), .in7(in7[23]), .in6(in6[23]), .in5(in5[23]), .in4(in4[23]), .in3(in3[23]), .in2(in2[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux8p  mux_24 (.out(out[24]), .in7(in7[24]), .in6(in6[24]), .in5(in5[24]), .in4(in4[24]), .in3(in3[24]), .in2(in2[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux8p  mux_25 (.out(out[25]), .in7(in7[25]), .in6(in6[25]), .in5(in5[25]), .in4(in4[25]), .in3(in3[25]), .in2(in2[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux8p  mux_26 (.out(out[26]), .in7(in7[26]), .in6(in6[26]), .in5(in5[26]), .in4(in4[26]), .in3(in3[26]), .in2(in2[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux8p  mux_27 (.out(out[27]), .in7(in7[27]), .in6(in6[27]), .in5(in5[27]), .in4(in4[27]), .in3(in3[27]), .in2(in2[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux8p  mux_28 (.out(out[28]), .in7(in7[28]), .in6(in6[28]), .in5(in5[28]), .in4(in4[28]), .in3(in3[28]), .in2(in2[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));
    mux8p  mux_29 (.out(out[29]), .in7(in7[29]), .in6(in6[29]), .in5(in5[29]), .in4(in4[29]), .in3(in3[29]), .in2(in2[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl));
    mux8p  mux_30 (.out(out[30]), .in7(in7[30]), .in6(in6[30]), .in5(in5[30]), .in4(in4[30]), .in3(in3[30]), .in2(in2[30]), .in1(in1[30]), .in0(in0[30]), .sel(sl));
    mux8p  mux_31 (.out(out[31]), .in7(in7[31]), .in6(in6[31]), .in5(in5[31]), .in4(in4[31]), .in3(in3[31]), .in2(in2[31]), .in1(in1[31]), .in0(in0[31]), .sel(sl));

endmodule 


module mux2_40 (out, in1, in0, sel);
    output [39:0] out;
    input  [39:0] in1; 
    input  [39:0] in0; 
    input  [1:0] sel;
wire  [1:0] slb;
wire  [1:0] sl;
mj_p_muxpri2 mj_p_muxpri2_i1 (.sl(sel),.slb(slb));
assign sl = ~slb;

    mux2p  mux_0 (.out(out[0]), .in1(in1[0]), .in0(in0[0]), .sel(sl));
    mux2p  mux_1 (.out(out[1]), .in1(in1[1]), .in0(in0[1]), .sel(sl));
    mux2p  mux_2 (.out(out[2]), .in1(in1[2]), .in0(in0[2]), .sel(sl));
    mux2p  mux_3 (.out(out[3]), .in1(in1[3]), .in0(in0[3]), .sel(sl));
    mux2p  mux_4 (.out(out[4]), .in1(in1[4]), .in0(in0[4]), .sel(sl));
    mux2p  mux_5 (.out(out[5]), .in1(in1[5]), .in0(in0[5]), .sel(sl));
    mux2p  mux_6 (.out(out[6]), .in1(in1[6]), .in0(in0[6]), .sel(sl));
    mux2p  mux_7 (.out(out[7]), .in1(in1[7]), .in0(in0[7]), .sel(sl));
    mux2p  mux_8 (.out(out[8]), .in1(in1[8]), .in0(in0[8]), .sel(sl));
    mux2p  mux_9 (.out(out[9]), .in1(in1[9]), .in0(in0[9]), .sel(sl));
    mux2p  mux_10 (.out(out[10]), .in1(in1[10]), .in0(in0[10]), .sel(sl));
    mux2p  mux_11 (.out(out[11]), .in1(in1[11]), .in0(in0[11]), .sel(sl));
    mux2p  mux_12 (.out(out[12]), .in1(in1[12]), .in0(in0[12]), .sel(sl));
    mux2p  mux_13 (.out(out[13]), .in1(in1[13]), .in0(in0[13]), .sel(sl));
    mux2p  mux_14 (.out(out[14]), .in1(in1[14]), .in0(in0[14]), .sel(sl));
    mux2p  mux_15 (.out(out[15]), .in1(in1[15]), .in0(in0[15]), .sel(sl));
    mux2p  mux_16 (.out(out[16]), .in1(in1[16]), .in0(in0[16]), .sel(sl));
    mux2p  mux_17 (.out(out[17]), .in1(in1[17]), .in0(in0[17]), .sel(sl));
    mux2p  mux_18 (.out(out[18]), .in1(in1[18]), .in0(in0[18]), .sel(sl));
    mux2p  mux_19 (.out(out[19]), .in1(in1[19]), .in0(in0[19]), .sel(sl));
    mux2p  mux_20 (.out(out[20]), .in1(in1[20]), .in0(in0[20]), .sel(sl));
    mux2p  mux_21 (.out(out[21]), .in1(in1[21]), .in0(in0[21]), .sel(sl));
    mux2p  mux_22 (.out(out[22]), .in1(in1[22]), .in0(in0[22]), .sel(sl));
    mux2p  mux_23 (.out(out[23]), .in1(in1[23]), .in0(in0[23]), .sel(sl));
    mux2p  mux_24 (.out(out[24]), .in1(in1[24]), .in0(in0[24]), .sel(sl));
    mux2p  mux_25 (.out(out[25]), .in1(in1[25]), .in0(in0[25]), .sel(sl));
    mux2p  mux_26 (.out(out[26]), .in1(in1[26]), .in0(in0[26]), .sel(sl));
    mux2p  mux_27 (.out(out[27]), .in1(in1[27]), .in0(in0[27]), .sel(sl));
    mux2p  mux_28 (.out(out[28]), .in1(in1[28]), .in0(in0[28]), .sel(sl));
    mux2p  mux_29 (.out(out[29]), .in1(in1[29]), .in0(in0[29]), .sel(sl));
    mux2p  mux_30 (.out(out[30]), .in1(in1[30]), .in0(in0[30]), .sel(sl));
    mux2p  mux_31 (.out(out[31]), .in1(in1[31]), .in0(in0[31]), .sel(sl));
    mux2p  mux_32 (.out(out[32]), .in1(in1[32]), .in0(in0[32]), .sel(sl));
    mux2p  mux_33 (.out(out[33]), .in1(in1[33]), .in0(in0[33]), .sel(sl));
    mux2p  mux_34 (.out(out[34]), .in1(in1[34]), .in0(in0[34]), .sel(sl));
    mux2p  mux_35 (.out(out[35]), .in1(in1[35]), .in0(in0[35]), .sel(sl));
    mux2p  mux_36 (.out(out[36]), .in1(in1[36]), .in0(in0[36]), .sel(sl));
    mux2p  mux_37 (.out(out[37]), .in1(in1[37]), .in0(in0[37]), .sel(sl));
    mux2p  mux_38 (.out(out[38]), .in1(in1[38]), .in0(in0[38]), .sel(sl));
    mux2p  mux_39 (.out(out[39]), .in1(in1[39]), .in0(in0[39]), .sel(sl));

endmodule 




module mj_p_muxdec8_8 (decb, dec, sel);

input [2:0] sel;
output [7:0] dec;
output [7:0] decb;

 reg    [7:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys full_case parallel_case
      3'b000:    out = 8'h1;
      3'b001:    out = 8'h2;
      3'b010:    out = 8'h4;
      3'b011:    out = 8'h8;
      3'b100:    out = 8'h10;
      3'b101:    out = 8'h20;
      3'b110:    out = 8'h40;
      3'b111:    out = 8'h80;
      default: out = 8'hx;
   endcase
 end
assign dec = out;
assign decb = ~out;

endmodule


module mj_p_muxdec8_32 (decb, dec, sel);

input [2:0] sel;
output [7:0] dec;
output [7:0] decb;

reg    [7:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys full_case parallel_case
      3'b000:    out = 8'h1;
      3'b001:    out = 8'h2;
      3'b010:    out = 8'h4;
      3'b011:    out = 8'h8;
      3'b100:    out = 8'h10;
      3'b101:    out = 8'h20;
      3'b110:    out = 8'h40;
      3'b111:    out = 8'h80;
      default: out = 8'hx;
   endcase
 end
assign dec = out;
assign decb = ~out;


endmodule

module mj_p_muxdec8_16 (decb, dec, sel);

input [2:0] sel;
output [7:0] dec;
output [7:0] decb;

reg    [7:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys full_case parallel_case
      3'b000:    out = 8'h1;
      3'b001:    out = 8'h2;
      3'b010:    out = 8'h4;
      3'b011:    out = 8'h8;
      3'b100:    out = 8'h10;
      3'b101:    out = 8'h20;
      3'b110:    out = 8'h40;
      3'b111:    out = 8'h80;
      default: out = 8'hx;
   endcase
 end
assign dec = out;
assign decb = ~out;


endmodule
module mj_p_muxdec8 (decb, dec, sel);

input [2:0] sel;
output [7:0] decb, dec;

reg    [7:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys full_case parallel_case
      3'b000:    out = 8'h1;
      3'b001:    out = 8'h2;
      3'b010:    out = 8'h4;
      3'b011:    out = 8'h8;
      3'b100:    out = 8'h10;
      3'b101:    out = 8'h20;
      3'b110:    out = 8'h40;
      3'b111:    out = 8'h80;
      default: out = 8'hx;
   endcase
 end
assign dec = out;
assign decb = ~out;


endmodule

module mj_p_muxdec6_8 (decb, dec, sel);

input [2:0] sel;
output [5:0] dec;
output [5:0] decb;

 reg    [5:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys parallel_case
      3'b000:    out = 6'b000001;
      3'b001:    out = 6'b000010;   
      3'b010:    out = 6'b000100;
      3'b011:    out = 6'b001000;    
      3'b100:    out = 6'b010000;   
      3'b101:    out = 6'b100000;   
      3'b110:    out = 6'b010000;
        default: out = 6'b100000;
   endcase
 end
assign decb = ~out;
assign dec = out;
endmodule



module mj_p_muxdec6_32 (decb, dec, sel);

input [2:0] sel;
output [5:0] dec;
output [5:0] decb;

 reg    [5:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys parallel_case
      3'b000:    out = 6'b000001;
      3'b001:    out = 6'b000010;   
      3'b010:    out = 6'b000100;
      3'b011:    out = 6'b001000;    
      3'b100:    out = 6'b010000;   
      3'b101:    out = 6'b100000;   
      3'b110:    out = 6'b010000;
        default: out = 6'b100000;
   endcase
 end
assign decb = ~out;
assign dec = out;


endmodule

module mj_p_muxdec6_16 (decb, dec, sel);

input [2:0] sel;
output [5:0] dec;
output [5:0] decb;

 reg    [5:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys parallel_case
      3'b000:    out = 6'b000001;
      3'b001:    out = 6'b000010;   
      3'b010:    out = 6'b000100;
      3'b011:    out = 6'b001000;    
      3'b100:    out = 6'b010000;   
      3'b101:    out = 6'b100000;   
      3'b110:    out = 6'b010000;
        default: out = 6'b100000;
   endcase
 end
assign decb = ~out;
assign dec = out;



endmodule
module mj_p_muxdec6 (decb, dec, sel);

input [2:0] sel;
output [5:0] decb, dec;

 reg    [5:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys parallel_case
      3'b000:    out = 6'b000001;
      3'b001:    out = 6'b000010;   
      3'b010:    out = 6'b000100;
      3'b011:    out = 6'b001000;    
      3'b100:    out = 6'b010000;   
      3'b101:    out = 6'b100000;   
      3'b110:    out = 6'b010000;
        default: out = 6'b100000;
   endcase
 end
assign decb = ~out;
assign dec = out;


endmodule

module mj_p_muxdec4_8 (decb, dec, sel);

input [1:0] sel;
output [3:0] dec;
output [3:0] decb;

 reg    [3:0]  out; 

 always @(sel)  begin
   case(sel)      // synopsys full_case parallel_case
      2'b00:    out = 4'h1;
      2'b01:    out = 4'h2;
      2'b10:    out = 4'h4;
      2'b11:    out = 4'h8;
      default: out = 4'hx;
   endcase
 end
assign decb = ~out;
assign dec  = out;


endmodule

module mj_p_muxdec4_32 (decb, dec, sel);

input [1:0] sel;
output [3:0] dec;
output [3:0] decb;

 reg    [3:0]  out; 

 always @(sel)  begin
   case(sel)      // synopsys full_case parallel_case
      2'b00:    out = 4'h1;
      2'b01:    out = 4'h2;
      2'b10:    out = 4'h4;
      2'b11:    out = 4'h8;
      default: out = 4'hx;
   endcase
 end
assign decb = ~out;
assign dec  = out;


endmodule

module mj_p_muxdec4_16 (decb, dec, sel);

input [1:0] sel;
output [3:0] dec;
output [3:0] decb;

 reg    [3:0]  out; 

 always @(sel)  begin
   case(sel)      // synopsys full_case parallel_case
      2'b00:    out = 4'h1;
      2'b01:    out = 4'h2;
      2'b10:    out = 4'h4;
      2'b11:    out = 4'h8;
      default: out = 4'hx;
   endcase
 end
assign decb = ~out;
assign dec  = out;


endmodule
module mj_p_muxdec4 (decb, dec, sel);

input [1:0] sel;
output [3:0] decb, dec;

 reg    [3:0]  out; 

 always @(sel)  begin
   case(sel)      // synopsys full_case parallel_case
      2'b00:    out = 4'h1;
      2'b01:    out = 4'h2;
      2'b10:    out = 4'h4;
      2'b11:    out = 4'h8;
      default: out = 4'hx;
   endcase
 end
assign decb = ~out;
assign dec  = out;


endmodule

module mj_p_muxdec3_8 (decb, dec, sel);

input [1:0] sel;
output [2:0] dec;
output [2:0] decb;

reg    [2:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys parallel_case
      2'b00:    out = 3'b001;
      2'b01:    out = 3'b010;
      2'b10:    out = 3'b100;
      default:  out = 3'b100;
   endcase
 end
assign decb = ~out;
assign dec = out;


endmodule

module mj_p_muxdec3_32 (decb, dec, sel);

input [1:0] sel;
output [2:0] dec;
output [2:0] decb;

reg    [2:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys parallel_case
      2'b00:    out = 3'b001;
      2'b01:    out = 3'b010;
      2'b10:    out = 3'b100;
      default:  out = 3'b100;
   endcase
 end
assign decb = ~out;
assign dec = out;


endmodule

module mj_p_muxdec3_16 (decb, dec, sel);

input [1:0] sel;
output [2:0] dec;
output [2:0] decb;

reg    [2:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys parallel_case
      2'b00:    out = 3'b001;
      2'b01:    out = 3'b010;
      2'b10:    out = 3'b100;
      default:  out = 3'b100;
   endcase
 end
assign decb = ~out;
assign dec = out;

endmodule
module mj_p_muxdec3 (decb, dec, sel);

input [1:0] sel;
output [2:0] decb, dec;

reg    [2:0]  out;

 always @(sel)  begin
   case(sel)      // synopsys parallel_case
      2'b00:    out = 3'b001;
      2'b01:    out = 3'b010;
      2'b10:    out = 3'b100;
      default:  out = 3'b100;
   endcase
 end
assign decb = ~out;
assign dec = out;


endmodule

module mj_s_mux11_d_32 (mx_out,sel,in0,in1,in2,in3,in4,in5,in6,in7,in8,in9,in10);
output [31:0] mx_out;
input   [3:0] sel;
input  [31:0] in10;
input  [31:0] in9;
input  [31:0] in8;
input  [31:0] in7;
input  [31:0] in6;
input  [31:0] in5;
input  [31:0] in4;
input  [31:0] in3;
input  [31:0] in2;
input  [31:0] in1;
input  [31:0] in0;
//wire   [11:0] sl;
wire   [11:0] slb;
wire   [31:0] in10_7;
 
reg    [11:0] sl;
 
always @(sel)  begin
   case (sel)      // synopsys full_case parallel_case
      4'b0000:    sl = 12'h1;
      4'b0001:    sl = 12'h2;
      4'b0010:    sl = 12'h4;
      4'b0011:    sl = 12'h8;
      4'b0100:    sl = 12'h10;
      4'b0101:    sl = 12'h20;
      4'b0110:    sl = 12'h40;
      4'b0111:    sl = 12'h180;
      4'b1000:    sl = 12'h280;
      4'b1001:    sl = 12'h480;
      4'b1010:    sl = 12'h880;
      default:    sl = 12'h880;
   endcase
end
 
assign slb = ~sl;
 
mj_p_mux8_32  mj_p_mux8_32_0 (  .mx_out(mx_out),
                                .in7(in10_7),
                                .in6(in6),
                                .in5(in5),
                                .in4(in4),
                                .in3(in3),
                                .in2(in2),
                                .in1(in1),
                                .in0(in0),
                                .sel(sl[7:0]),
                                .sel_l(slb[7:0])
                                );
 
mj_p_mux4_32  mj_p_mux4_32_0 (  .mx_out(in10_7),
                                .in3(in10),
                                .in2(in9),
                                .in1(in8),
                                .in0(in7),
                                .sel(sl[11:8]),
                                .sel_l(slb[11:8])
                                );
 
endmodule
 
module mj_s_mux15_d_32 (mx_out,sel,in0,in1,in2,in3,in4,in5,in6,in7,in8,in9,in10,
in11,in12,in13,in14);
output [31:0] mx_out;
input   [3:0] sel;
input  [31:0] in14;
input  [31:0] in13;
input  [31:0] in12;
input  [31:0] in11;
input  [31:0] in10;
input  [31:0] in9;
input  [31:0] in8;
input  [31:0] in7;
input  [31:0] in6;
input  [31:0] in5;
input  [31:0] in4;
input  [31:0] in3;
input  [31:0] in2;
input  [31:0] in1;
input  [31:0] in0;
//wire   [15:0] sl;
wire   [15:0] slb;
wire   [31:0] in14_7;
 
reg    [15:0] sl;
 
always @(sel)  begin
   case (sel)      // synopsys full_case parallel_case
      4'b0000:    sl = 16'h1;
      4'b0001:    sl = 16'h2;
      4'b0010:    sl = 16'h4;
      4'b0011:    sl = 16'h8;
      4'b0100:    sl = 16'h10;
      4'b0101:    sl = 16'h20;
      4'b0110:    sl = 16'h40;
      4'b0111:    sl = 16'h180;
      4'b1000:    sl = 16'h280;
      4'b1001:    sl = 16'h480;
      4'b1010:    sl = 16'h880;
      4'b1011:    sl = 16'h1080;
      4'b1100:    sl = 16'h2080;
      4'b1101:    sl = 16'h4080;
      4'b1111:    sl = 16'h8080;
      default:    sl = 16'h8080;
   endcase
end
 
assign slb = ~sl;
 
mj_p_mux8_32  mj_p_mux8_32_up ( .mx_out(mx_out),
                                .in7(in14_7),
                                .in6(in6),
                                .in5(in5),
                                .in4(in4),
                                .in3(in3),
                                .in2(in2),
                                .in1(in1),
                                .in0(in0),
                                .sel(sl[7:0]),