Prev PageHierarchyFilesModulesSignalsTasksFunctionsHelp
ABCDEFGHIJKLMNOPQRSTUVWXYZ

Signals index

F
 F : ic_aligner : wire
Connects down to:mj_s_mux8_d_8:i_dout_8b_mux_63_56:in5 , mj_s_mux8_d_8:i_dout_8b_mux_55_48:in4 , mj_s_mux6_d_8:i_dout_8b_mux_47_40:in3 , mj_s_mux6_d_8:i_dout_8b_mux_39_32:in2 , mj_s_mux4_d_8:i_dout_8b_mux_31_24:in1 , mj_s_mux3_d_8:i_dout_8b_mux_23_16:in0 
 F0 : fold_logic : input
Connects up to:ifu:fold_logic:inst_1_type 
 F0 : fold_monitor : reg
 f00 : ucode_rom : reg
 f01 : ucode_rom : reg
 f02 : ucode_rom : reg
 f03 : ucode_rom : reg
 f04 : ucode_rom : reg
 f05 : ucode_rom : reg
 f06 : ucode_rom : reg
 f07 : ucode_rom : reg
 f08 : ucode_rom : reg
 f09 : ucode_rom : reg
 F1 : fold_logic : input
Connects up to:ifu:fold_logic:inst_2_type 
 F1 : fold_monitor : reg
 f10 : ucode_rom : reg
 f11 : ucode_rom : reg
 f12 : ucode_rom : reg
 f13 : ucode_rom : reg
 f14 : ucode_rom : reg
 f15 : ucode_rom : reg
 f16 : ucode_rom : reg
 f17 : ucode_rom : reg
 f18 : ucode_rom : reg
 f18_last_cyc : ucode_seq : wire
 f19 : ucode_rom : reg
 F2 : fold_logic : input
Connects up to:ifu:fold_logic:inst_3_type 
 F2 : fold_monitor : reg
 f20 : ucode_rom : reg
 f21 : ucode_rom : reg
 f22 : ucode_rom : reg
 f23 : ucode_rom : reg
 f2d : ex_ctl : wire
 f2d : rs1_dec : reg
 f2i : ex_ctl : wire
 f2i : rs1_dec : reg
 f2l : ex_ctl : wire
 f2l : rs1_dec : reg
 F3 : fold_logic : input
Connects up to:ifu:fold_logic:inst_4_type 
 F3 : fold_monitor : reg
 fadd : ex_ctl : wire
 fadd : mult_add : wire
Connects down to:mult_addinc:addinc_0:fadd , mj_s_mux4_d_16:spmux_23_8:in0 , mj_s_mux4_d_16:spmux_23_8:in3 , mj_s_mux4_d_8:spmux_7_0:in0 , mj_s_mux4_d_8:spmux_7_0:in3 
 fadd : mult_addinc : output
Connects up to:mult_add:addinc_0:fadd 
 FAIL : Controller : output
 FAIL : Controller1 : output
 FAIL : icram_Controller : output
 FAIL : itag_Controller : output
 faload : ex_ctl : wire
 fastore : ex_ctl : wire
 fastout : branch_dec : wire
Connects down to:mj_s_mux4_d:m0:mx_out , mj_s_mux4_d:m1:in0 , mj_s_mux4_d:m2:in0 , mj_s_mux4_d:m3:in0 , mj_s_mux4_d:m4:in0 
 fast_trap : trap : wire
 fcmpg : ex_ctl : wire
 fcmpl : ex_ctl : wire
 fconst_0 : decode_opcode : output
Connects up to:rcu_ctl:decode_opcode_rs1:fconst_0_rs1 , rcu_ctl:decode_opcode_rs2:fconst_0_rs2 
 fconst_0 : ex_ctl : wire
 fconst_0 : rs1_dec : reg
 fconst_0 : rs2_dec : wire
 fconst_0_rs1 : rcu_ctl : wire
Connects down to:decode_opcode:decode_opcode_rs1:fconst_0 
 fconst_0_rs2 : rcu_ctl : wire
Connects down to:decode_opcode:decode_opcode_rs2:fconst_0 
 fconst_1 : decode_opcode : output
Connects up to:rcu_ctl:decode_opcode_rs1:fconst_1_rs1 , rcu_ctl:decode_opcode_rs2:fconst_1_rs2 
 fconst_1 : ex_ctl : wire
 fconst_1 : rs1_dec : reg
 fconst_1 : rs2_dec : wire
 fconst_1_rs1 : rcu_ctl : wire
Connects down to:decode_opcode:decode_opcode_rs1:fconst_1 
 fconst_1_rs2 : rcu_ctl : wire
Connects down to:decode_opcode:decode_opcode_rs2:fconst_1 
 fconst_2 : decode_opcode : output
Connects up to:rcu_ctl:decode_opcode_rs1:fconst_2_rs1 , rcu_ctl:decode_opcode_rs2:fconst_2_rs2 
 fconst_2 : ex_ctl : wire
 fconst_2 : rs1_dec : reg
 fconst_2 : rs2_dec : wire
 fconst_2_rs1 : rcu_ctl : wire
Connects down to:decode_opcode:decode_opcode_rs1:fconst_2 
 fconst_2_rs2 : rcu_ctl : wire
Connects down to:decode_opcode:decode_opcode_rs2:fconst_2 
 fdiv : ex_ctl : wire
 femul : trap : wire
 fetch_drty : ifu : input
Connects up to:iu:ifu:icu_drty 
 fetch_len0 : ifu : input
Connects down to:length_dec:length_dec:fetch_len0 
Connects up to:iu:ifu:icu_length_d 
 fetch_len0 : length_dec : input
Connects down to:sp_mux4_8:mux_len1:sel 
Connects up to:ifu:length_dec:fetch_len0 
 fetch_len1 : ifu : input
Connects down to:length_dec:length_dec:fetch_len1 , valid_dec:valid_dec:fetch_len1 
Connects up to:iu:ifu:icu_length_d 
 fetch_len1 : length_dec : input
Connects down to:index1_add:index1_add:operand 
Connects up to:ifu:length_dec:fetch_len1 
 fetch_len1 : valid_dec : input
Connects down to:mux4:mux_vld_1_byte:sel 
Connects up to:ifu:valid_dec:fetch_len1 
 fetch_len2 : ifu : input
Connects down to:length_dec:length_dec:fetch_len2 , valid_dec:valid_dec:fetch_len2 
Connects up to:iu:ifu:icu_length_d 
 fetch_len2 : length_dec : input
Connects down to:index2_add:index2_add:operand 
Connects up to:ifu:length_dec:fetch_len2 
 fetch_len2 : valid_dec : input
Connects down to:mux4:mux_vld_2_byte:sel 
Connects up to:ifu:valid_dec:fetch_len2 
 fetch_len3 : ifu : input
Connects down to:length_dec:length_dec:fetch_len3 , valid_dec:valid_dec:fetch_len3 
Connects up to:iu:ifu:icu_length_d 
 fetch_len3 : length_dec : input
Connects down to:index3_add:index3_add:operand 
Connects up to:ifu:length_dec:fetch_len3 
 fetch_len3 : valid_dec : input
Connects down to:mux4:mux_vld_3_byte:sel 
Connects up to:ifu:valid_dec:fetch_len3 
 fetch_len4 : ifu : input
Connects down to:length_dec:length_dec:fetch_len4 , valid_dec:valid_dec:fetch_len4 
Connects up to:iu:ifu:icu_length_d 
 fetch_len4 : length_dec : input
Connects down to:index4_add:index4_add:operand 
Connects up to:ifu:length_dec:fetch_len4 
 fetch_len4 : valid_dec : input
Connects down to:mux4:mux_vld_4_byte:sel 
Connects up to:ifu:valid_dec:fetch_len4 
 fetch_len5 : ifu : input
Connects down to:length_dec:length_dec:fetch_len5 , valid_dec:valid_dec:fetch_len5 
Connects up to:iu:ifu:icu_length_d 
 fetch_len5 : length_dec : input
Connects down to:index5_add:index5_add:operand 
Connects up to:ifu:length_dec:fetch_len5 
 fetch_len5 : valid_dec : input
Connects down to:mux4:mux_vld_5_byte:sel 
Connects up to:ifu:valid_dec:fetch_len5 
 fetch_len6 : ifu : input
Connects down to:length_dec:length_dec:fetch_len6 , valid_dec:valid_dec:fetch_len6 
Connects up to:iu:ifu:icu_length_d 
 fetch_len6 : length_dec : input
Connects down to:index6_add:index6_add:operand 
Connects up to:ifu:length_dec:fetch_len6 
 fetch_len6 : valid_dec : input
Connects down to:mux4:mux_vld_6_byte:sel 
Connects up to:ifu:valid_dec:fetch_len6 
 fetch_valid : ifu : input
Connects down to:ex_len_dec:ex_len_dec:valid , valid_dec:valid_dec:fetch_valid , main_dec:main_dec:fetch_valid 
Connects up to:iu:ifu:icu_vld_d 
 fetch_valid : main_dec : input
Connects down to:rs1_dec:rs1_dec:valid , rs2_dec:rs2_dec_len1:valid , rs2_dec:rs2_dec_len2:valid , rs2_dec:rs2_dec_len3:valid , rsd_dec:rsd_dec_byte0:valid , rsd_dec:rsd_dec_byte1:valid , rsd_dec:rsd_dec_byte2:valid , rsd_dec:rsd_dec_byte3:valid , rsd_dec:rsd_dec_byte4:valid , rsd_dec:rsd_dec_byte5:valid , rsd_dec:rsd_dec_byte6:valid 
Connects up to:ifu:main_dec:fetch_valid 
 fetch_valid : valid_dec : input
Connects up to:ifu:valid_dec:fetch_valid 
 filename1 : picoJavaII : reg
 filename2 : picoJavaII : reg
 filename3 : picoJavaII : reg
 filename4 : picoJavaII : reg
 filename5 : picoJavaII : reg
 filename6 : picoJavaII : reg
 filename7 : picoJavaII : reg
 filename8 : picoJavaII : reg
 fill : monitor : wire
Connects down to:smu_monitor:smu_monitor:fill 
 fill : smu : wire
Connects down to:smu_ctl:smu_ctl:fill , smu_dpath:smu_dpath:fill 
 fill : smu_ctl : output
Connects down to:ff_sre:load_c_flop:din 
Connects up to:smu:smu_ctl:fill 
 fill : smu_dpath : input
Connects down to:inc_dec_30:inc_dec:control 
Connects up to:smu:smu_dpath:fill 
 fill : smu_monitor : input
Connects up to:monitor:smu_monitor:fill , monitor:smu_monitor:smu , monitor:smu_monitor:smu_ctl 
 fill_bank_sel : dcudp_cntl : wire
Connects down to:mux4:dcu_bank_sel_mux:in3 
 fill_byte : dcctl : output
Connects down to:dc_dec:dc_dec:fill_byte 
Connects up to:dcu_nocache:dcctl:fill_byte , dcu:dcctl:fill_byte 
 fill_byte : dcu : wire
Connects down to:dcctl:dcctl:fill_byte , dcu_dpath:dcu_dpath:fill_byte 
 fill_byte : dcu_dpath : input
Connects down to:mux2_32:dcu_biu_adr_mux:in1 
Connects up to:dcu_nocache:dcu_dpath:fill_byte , dcu:dcu_dpath:fill_byte 
 fill_byte : dcu_nocache : wire
Connects down to:dcctl:dcctl:fill_byte , dcu_dpath:dcu_dpath:fill_byte 
 fill_byte : dc_dec : output
Connects up to:dcctl:dc_dec:fill_byte 
 fill_cyc_active : dcctl : wire
Connects down to:dc_dec:dc_dec:fill_cyc_active , dcudp_cntl:dcudp_cntl:fill_cyc_active , miss_cntl:miss_cntl:fill_cyc_active 
 fill_cyc_active : dcudp_cntl : input
Connects up to:dcctl:dcudp_cntl:fill_cyc_active 
 fill_cyc_active : dc_dec : input
Connects down to:ff_sre_8:iu_miss_stall_reg:enable , ff_sre_4:smu_miss_stall_reg:enable 
Connects up to:dcctl:dc_dec:fill_cyc_active 
 fill_cyc_active : miss_cntl : output
Connects up to:dcctl:miss_cntl:fill_cyc_active 
 fill_d : monitor : wire
Connects down to:smu_monitor:smu_monitor:fill_d 
 fill_d : smu_ctl : wire
Connects down to:ff_sr:fill_flop:din 
 fill_d : smu_monitor : input
Connects up to:monitor:smu_monitor:fill_d , monitor:smu_monitor:smu , monitor:smu_monitor:smu_ctl 
 fill_e : smu_ctl : wire
Connects down to:ff_sr:fill_flop:out 
 fill_raw : smu_ctl : wire
Connects down to:comp30_6:fill_comp:result 
 fill_sel : ibuf_ctl_slice : output
Connects up to:ibuf_ctl:ibuf_ctl_0:ic_fill_sel , ibuf_ctl:ibuf_ctl_1:ic_fill_sel , ibuf_ctl:ibuf_ctl_2:ic_fill_sel , ibuf_ctl:ibuf_ctl_3:ic_fill_sel , ibuf_ctl:ibuf_ctl_4:ic_fill_sel , ibuf_ctl:ibuf_ctl_5:ic_fill_sel , ibuf_ctl:ibuf_ctl_6:ic_fill_sel , ibuf_ctl:ibuf_ctl_7:ic_fill_sel , ibuf_ctl:ibuf_ctl_8:ic_fill_sel , ibuf_ctl:ibuf_ctl_9:ic_fill_sel , ibuf_ctl:ibuf_ctl_10:ic_fill_sel , ibuf_ctl:ibuf_ctl_11:ic_fill_sel , ibuf_ctl:ibuf_ctl_12:ic_fill_sel , ibuf_ctl:ibuf_ctl_13:ic_fill_sel , ibuf_ctl:ibuf_ctl_14:ic_fill_sel , ibuf_ctl:ibuf_ctl_15:ic_fill_sel 
 fill_set_sel : dcudp_cntl : wire
Connects down to:ff_sre:tag_set_reg:din 
 fill_set_sel_d1 : dcudp_cntl : wire
Connects down to:ff_sre:tag_set_reg:out , mux5:dcu_set_sel_mux:in3 
 fill_word_addr : icctl : output
Connects down to:ic_cntl:ic_cntl:fill_word_addr 
Connects up to:icu_nocache:icctl:fill_word_addr , icu:icctl:fill_word_addr 
 fill_word_addr : icu : wire
Connects down to:icctl:icctl:fill_word_addr , icu_dpath:icu_dpath:fill_word_addr 
 fill_word_addr : icu_dpath : input
Connects up to:icu_nocache:icu_dpath:fill_word_addr , icu:icu_dpath:fill_word_addr 
 fill_word_addr : icu_nocache : wire
Connects down to:icctl:icctl:fill_word_addr , icu_dpath:icu_dpath:fill_word_addr 
 fill_word_addr : ic_cntl : output
Connects up to:icctl:ic_cntl:fill_word_addr 
 final6c_bit15 : guesscout : output
Connects down to:mj_s_mux2_d_4:guessfinal0:mx_out 
Connects up to:mult_array:guesscout0:final6c_bit15 
 final6c_bit15 : mult_array : wire
Connects down to:guesscout:guesscout0:final6c_bit15 
 final6c_bit16 : guesscout : output
Connects down to:mj_s_mux2_d_4:guessfinal0:mx_out 
Connects up to:mult_array:guesscout0:final6c_bit16 
 final6c_bit16 : mult_array : wire
Connects down to:guesscout:guesscout0:final6c_bit16 
 final6s_bit14 : guesscout : output
Connects down to:mj_s_mux2_d_4:guessfinal0:mx_out 
Connects up to:mult_array:guesscout0:final6s_bit14 
 final6s_bit14 : mult_array : wire
Connects down to:guesscout:guesscout0:final6s_bit14 
 final6s_bit15 : guesscout : output
Connects down to:mj_s_mux2_d_4:guessfinal0:mx_out 
Connects up to:mult_array:guesscout0:final6s_bit15 
 final6s_bit15 : mult_array : wire
Connects down to:guesscout:guesscout0:final6s_bit15 
 final_data_sel_rs1 : rcu : wire
Connects down to:rcu_dpath:rcu_dpath:final_data_sel_rs1 , rcu_ctl:rcu_ctl:final_data_sel_rs1 
 final_data_sel_rs1 : rcu_ctl : output
Connects up to:rcu:rcu_ctl:final_data_sel_rs1 
 final_data_sel_rs1 : rcu_dpath : input
Connects down to:mux2_32:mux_final_data_rs1:sel 
Connects up to:rcu:rcu_dpath:final_data_sel_rs1 
 final_data_sel_rs2 : rcu : wire
Connects down to:rcu_dpath:rcu_dpath:final_data_sel_rs2 , rcu_ctl:rcu_ctl:final_data_sel_rs2 
 final_data_sel_rs2 : rcu_ctl : output
Connects up to:rcu:rcu_ctl:final_data_sel_rs2 
 final_data_sel_rs2 : rcu_dpath : input
Connects down to:mux2_32:mux_final_data_rs2:sel 
Connects up to:rcu:rcu_dpath:final_data_sel_rs2 
 final_sel : branch_dec : reg
Connects down to:mj_s_mux4_d:m1:sel , mj_s_mux4_d:m2:sel , mj_s_mux4_d:m3:sel , mj_s_mux4_d:m4:sel 
 first_cyc : dest_decoder : input
Connects up to:rcu_ctl:dest_dec:first_cycle 
 first_cycle : rcu : output
Connects down to:rcu_ctl:rcu_ctl:first_cycle 
Connects up to:iu:rcu:first_cyc_r 
 first_cycle : rcu_ctl : output
Connects down to:dest_decoder:dest_dec:first_cyc , ff_sre:flop_fc_e:din 
Connects up to:rcu:rcu_ctl:first_cycle 
 first_cycle_c : rcu_ctl : wire
Connects down to:ff_sre:flop_fc_c:out , ff_sr:flop_fc_w:din 
 first_cycle_e : rcu_ctl : wire
Connects down to:ff_sre:flop_fc_e:out , ff_sre:flop_fc_c:din 
 first_cycle_w : rcu_ctl : wire
Connects down to:ff_sr:flop_fc_w:out 
 first_cyc_c : trap : wire
Connects down to:ff_sre:first_cyc_c_reg:out 
 first_cyc_e : ex : output
Connects down to:ex_ctl:ex_ctl:first_cyc_e 
Connects up to:iu:ex:first_cyc_e 
 first_cyc_e : ex_ctl : output wire
Connects down to:ff_sre:first_cyc_reg:out , ff_sre:first_gt_reg:din , ff_sre:first_eq_reg:din , ff_sre:first_lt_reg:din 
Connects up to:ex:ex_ctl:first_cyc_e 
 first_cyc_e : hold_logic : wire
Connects down to:ff_sre:first_cyc_e_reg:out 
 first_cyc_e : iu : wire
Connects down to:ex:ex:first_cyc_e , trap:trap:first_cyc_e 
 first_cyc_e : trap : input
Connects down to:ff_sre:first_cyc_c_reg:din 
Connects up to:iu:trap:first_cyc_e 
 first_cyc_r : ex : input
Connects down to:ex_ctl:ex_ctl:first_cyc_r 
Connects up to:iu:ex:first_cyc_r 
 first_cyc_r : ex_ctl : input
Connects down to:ff_sre:first_cyc_reg:din 
Connects up to:ex:ex_ctl:first_cyc_r 
 first_cyc_r : hold_logic : input
Connects down to:ff_sre:first_cyc_e_reg:din 
Connects up to:iu:hold_logic:first_cyc_r 
 first_cyc_r : iu : wire
Connects down to:ex:ex:first_cyc_r , rcu:rcu:first_cycle , pipe:pipe:first_cyc_r , hold_logic:hold_logic:first_cyc_r 
 first_cyc_r : pipe : input
Connects down to:pipe_cntl:pipe_cntl:first_cyc_r 
Connects up to:iu:pipe:first_cyc_r 
 first_cyc_r : pipe_cntl : input
Connects up to:pipe:pipe_cntl:first_cyc_r 
 first_eq : ex_ctl : wire
Connects down to:ff_sre:first_eq_reg:out 
 first_fill_cyc : dcctl : wire
Connects down to:dc_dec:dc_dec:first_fill_cyc , dcudp_cntl:dcudp_cntl:first_fill_cyc , wrbuf_cntl:wrbuf_cntl:first_fill_cyc , miss_cntl:miss_cntl:first_fill_cyc 
 first_fill_cyc : dcudp_cntl : input
Connects up to:dcctl:dcudp_cntl:first_fill_cyc 
 first_fill_cyc : dc_dec : input
Connects down to:ff_sr:fill_cyc_d1reg:din 
Connects up to:dcctl:dc_dec:first_fill_cyc 
 first_fill_cyc : miss_cntl : output
Connects up to:dcctl:miss_cntl:first_fill_cyc 
 first_fill_cyc : wrbuf_cntl : input
Connects up to:dcctl:wrbuf_cntl:first_fill_cyc 
 first_fill_cyc_d1 : dc_dec : wire
Connects down to:ff_sr:fill_cyc_d1reg:out 
 first_gt : ex_ctl : wire
Connects down to:ff_sre:first_gt_reg:out 
 first_lt : ex_ctl : wire
Connects down to:ff_sre:first_lt_reg:out 
 first_vld_c : hold_logic : input
Connects up to:iu:hold_logic:first_vld_c 
 first_vld_c : iu : wire
Connects down to:rcu:rcu:first_vld_c , hold_logic:hold_logic:first_vld_c 
 first_vld_c : rcu : output
Connects down to:rcu_ctl:rcu_ctl:first_vld_c 
Connects up to:iu:rcu:first_vld_c 
 first_vld_c : rcu_ctl : output
Connects up to:rcu:rcu_ctl:first_vld_c 
 fle : fold_monitor : reg
 fload : ex_ctl : wire
 fload : rs1_dec : reg
 fload : rs2_dec : wire
 fload_0 : ex_ctl : wire
 fload_0 : rs1_dec : reg
 fload_0 : rs2_dec : wire
 fload_1 : ex_ctl : wire
 fload_1 : rs1_dec : reg
 fload_1 : rs2_dec : wire
 fload_2 : ex_ctl : wire
 fload_2 : rs1_dec : reg
 fload_2 : rs2_dec : wire
 fload_3 : ex_ctl : wire
 fload_3 : rs1_dec : reg
 fload_3 : rs2_dec : wire
 flush_index_set : dcudp_cntl : wire
Connects down to:mux5:dcu_set_sel_mux:in1 
 flush_inst_c : dcudp_cntl : wire
Connects down to:ff_sr_2:flush_inst_c2_reg:din 
 flush_inst_c1 : dcudp_cntl : wire
Connects down to:ff_sr_2:flush_inst_c2_reg:out , ff_sr_2:flush_inst_c2_reg:din 
 flush_inst_c2 : dcctl : wire
Connects down to:dcudp_cntl:dcudp_cntl:flush_inst_c2 , wrbuf_cntl:wrbuf_cntl:flush_inst_c2 
 flush_inst_c2 : dcudp_cntl : output wire
Connects down to:ff_sr_2:flush_inst_c2_reg:out 
Connects up to:dcctl:dcudp_cntl:flush_inst_c2 
 flush_inst_c2 : wrbuf_cntl : input
Connects up to:dcctl:wrbuf_cntl:flush_inst_c2 
 flush_inst_c_or_c1 : dcctl : wire
Connects down to:dcudp_cntl:dcudp_cntl:flush_inst_c_or_c1 , wrbuf_cntl:wrbuf_cntl:flush_inst_c_or_c1 
 flush_inst_c_or_c1 : dcudp_cntl : output wire
Connects up to:dcctl:dcudp_cntl:flush_inst_c_or_c1 
 flush_inst_c_or_c1 : wrbuf_cntl : input
Connects up to:dcctl:wrbuf_cntl:flush_inst_c_or_c1 
 flush_pipe : smu_ctl : wire
Connects down to:ff_sr:spill_flop:din , ff_sr:fill_flop:din 
 flush_set : dcudp_cntl : wire
Connects down to:ff_sr:flush_set_sel_reg:din 
 flush_set_sel : dcctl : wire
Connects down to:dcudp_cntl:dcudp_cntl:flush_set_sel , wrbuf_cntl:wrbuf_cntl:flush_set_sel 
 flush_set_sel : dcudp_cntl : output wire
Connects down to:mux4:dcu_bank_sel_mux:in1 
Connects up to:dcctl:dcudp_cntl:flush_set_sel 
 flush_set_sel : wrbuf_cntl : input
Connects up to:dcctl:wrbuf_cntl:flush_set_sel 
 flush_set_sel_d1 : dcudp_cntl : wire
Connects down to:ff_sr:flush_set_sel_reg:out 
 fmul : ex_ctl : wire
 fmulovf : branch_dec : input
Connects down to:branch_decode1:b1:fmulovf , branch_decode2:b2:fmulovf , branch_decode3:b3:fmulovf , branch_decode4:b4:fmulovf 
Connects up to:code_seq_cntl:branchd:fmulovf 
 fmulovf : branch_decode1 : input
Connects up to:branch_dec:b1:fmulovf 
 fmulovf : branch_decode2 : input
Connects up to:branch_dec:b2:fmulovf 
 fmulovf : branch_decode3 : input
Connects up to:branch_dec:b3:fmulovf 
 fmulovf : branch_decode4 : input
Connects up to:branch_dec:b4:fmulovf 
 fmulovf : code_seq : input
Connects down to:code_seq_cntl:p_code_seq_cntl:fmulovf 
Connects up to:fpu:cs:fmulovf 
 fmulovf : code_seq_cntl : input
Connects down to:branch_dec:branchd:fmulovf 
Connects up to:code_seq:p_code_seq_cntl:fmulovf 
 fmulovf : exponent : output wire
Connects down to:exponent_cntl:p_exponent_cntl:fmulovf 
Connects up to:fpu:exp:fmulovf 
 fmulovf : exponent_cntl : output
Connects up to:exponent:p_exponent_cntl:fmulovf 
 fmulovf : fpu : wire
Connects down to:exponent:exp:fmulovf , code_seq:cs:fmulovf 
 fneg : ex_ctl : wire
 FOE : fold_logic : input
Connects up to:ifu:fold_logic:fold_enable 
 FOE : fold_monitor : reg
 fold : ifu : wire
Connects down to:ff_sre:flop_fold:din 
 fold1 : fold_logic : output
Connects up to:ifu:fold_logic:fold_1_inst 
 fold1 : fold_monitor : reg
 fold2 : fold_logic : output
Connects up to:ifu:fold_logic:fold_2_inst 
 fold2 : fold_monitor : reg
 fold3 : fold_logic : output
Connects up to:ifu:fold_logic:fold_3_inst 
 fold3 : fold_monitor : reg
 fold4 : fold_logic : output
Connects up to:ifu:fold_logic:fold_4_inst 
 fold4 : fold_monitor : reg
 fold_1_inst : ifu : wire
Connects down to:length_dec:length_dec:fold_1_inst , fold_logic:fold_logic:fold1 , ff_sre:flop_no_fold:din , mux5_3:mux_inst_fold:sel 
 fold_1_inst : length_dec : input
Connects down to:sp_mux4_8:mux_shift_d:sel 
Connects up to:ifu:length_dec:fold_1_inst 
 fold_2_inst : ifu : wire
Connects down to:length_dec:length_dec:fold_2_inst , fold_logic:fold_logic:fold2 , mux5_3:mux_inst_fold:sel 
 fold_2_inst : length_dec : input
Connects down to:sp_mux4_8:mux_shift_d:sel 
Connects up to:ifu:length_dec:fold_2_inst 
 fold_3_inst : ifu : wire
Connects down to:length_dec:length_dec:fold_3_inst , fold_logic:fold_logic:fold3 , mux5_3:mux_inst_fold:sel 
 fold_3_inst : length_dec : input
Connects down to:sp_mux4_8:mux_shift_d:sel 
Connects up to:ifu:length_dec:fold_3_inst 
 fold_4_inst : ifu : wire
Connects down to:length_dec:length_dec:fold_4_inst , fold_logic:fold_logic:fold4 , mux5_3:mux_inst_fold:sel 
 fold_4_inst : length_dec : input
Connects down to:sp_mux4_8:mux_shift_d:sel 
Connects up to:ifu:length_dec:fold_4_inst 
 fold_c : ex : input
Connects down to:ex_regs:ex_regs:fold_c 
Connects up to:iu:ex:fold_c 
 fold_c : ex_regs : input
Connects up to:ex:ex_regs:fold_c 
 fold_c : iu : wire
Connects down to:ex:ex:fold_c , pipe:pipe:fold_c , trap:trap:fold_c 
 fold_c : pipe : output
Connects down to:pipe_cntl:pipe_cntl:fold_c 
Connects up to:iu:pipe:fold_c 
 fold_c : pipe_cntl : output wire
Connects up to:pipe:pipe_cntl:fold_c 
 fold_c : trap : input
Connects down to:ff_sre:iu_trap_reg:din 
Connects up to:iu:trap:fold_c 
 fold_c_out : pipe_cntl : wire
Connects down to:ff_sre:fold_c_reg:out 
 fold_c_trapped : pipe_cntl : wire
Connects down to:ff_sr:fold_trapped_reg:din 
 fold_e : pipe_cntl : wire
 fold_enable : fold_monitor : integer
 fold_enable : ifu : wire
Connects down to:fold_logic:fold_logic:FOE 
 fold_e_raw : pipe_cntl : wire
Connects down to:ff_sre:fold_e_reg:out , ff_sre:fold_c_reg:din 
 fold_num : fold_monitor : integer
 fold_r : ifu : output
Connects down to:ff_sre:flop_fold:out 
Connects up to:iu:ifu:fold_r 
 fold_r : iu : wire
Connects down to:ifu:ifu:fold_r , pipe:pipe:fold_r 
 fold_r : pipe : input
Connects down to:pipe_cntl:pipe_cntl:fold_r 
Connects up to:iu:pipe:fold_r 
 fold_r : pipe_cntl : input
Connects up to:pipe:pipe_cntl:fold_r 
 fold_r_out : pipe_cntl : wire
Connects down to:ff_sre:fold_e_reg:din 
 fold_sc_miss_c : pipe_cntl : wire
Connects down to:ff_sre:vld_e_reg:enable , ff_sre:vld_e_v1_reg:enable , ff_sre:vld_c_reg:enable , ff_sre:fold_sc_reg:out 
 fold_sc_miss_e : iu : wire
Connects down to:pipe:pipe:fold_sc_miss_e , trap:trap:fold_sc_miss_e 
 fold_sc_miss_e : pipe : output
Connects down to:pipe_cntl:pipe_cntl:fold_sc_miss_e 
Connects up to:iu:pipe:fold_sc_miss_e 
 fold_sc_miss_e : pipe_cntl : output wire
Connects down to:ff_sre:fold_sc_reg:din 
Connects up to:pipe:pipe_cntl:fold_sc_miss_e 
 fold_sc_miss_e : trap : input
Connects up to:iu:trap:fold_sc_miss_e 
 fold_state : pipe_cntl : wire
Connects down to:ff_sr_4:fold_state_reg:out , ff_s:fold_state_reg_0:out 
 fold_str : fold_monitor : reg
 fold_trapped : pipe_cntl : wire
Connects down to:ff_sr:fold_trapped_reg:out 
 fopcode : fpu_mon : reg
 forward_c_sel_din : ex : input
Connects down to:ex_dpath:ex_dpath:forward_c_sel_din 
Connects up to:iu:ex:forward_c_sel_din 
 forward_c_sel_din : ex_dpath : input
Connects down to:ff_sr:for_c_flop:din 
Connects up to:ex:ex_dpath:forward_c_sel_din 
 forward_c_sel_din : iu : wire
Connects down to:ex:ex:forward_c_sel_din , pipe:pipe:forward_c_sel_din 
 forward_c_sel_din : pipe : output
Connects down to:pipe_cntl:pipe_cntl:forward_c_sel_din 
Connects up to:iu:pipe:forward_c_sel_din 
 forward_c_sel_din : pipe_cntl : output
Connects up to:pipe:pipe_cntl:forward_c_sel_din 
 forward_data_c : ex_dpath : wire
Connects down to:mux5_32:rs1_bypass_mux:in3 , mux5:rs1_0_bypass_mux:in3 , mux5_32:rs2_bypass_mux:in3 , mux5:rs2_0_bypass_mux:in3 , mux2_32:forward_data_c_mux:out 
 forward_data_c_mux_sel : ex_dpath : wire
Connects down to:mux2_32:forward_data_c_mux:sel , ff_sr:for_c_flop:out 
 forward_data_w : ex_dpath : wire
Connects down to:mux5_32:rs1_bypass_mux:in2 , mux5:rs1_0_bypass_mux:in2 , mux5_32:rs2_bypass_mux:in2 , mux5:rs2_0_bypass_mux:in2 , mux2_32:forward_data_w_mux:out , ff_s_32:forward_data_w_reg:din 
 forward_data_w1 : ex_dpath : wire
Connects down to:mux5_32:rs1_bypass_mux:in1 , mux5:rs1_0_bypass_mux:in1 , mux5_32:rs2_bypass_mux:in1 , mux5:rs2_0_bypass_mux:in1 , ff_s_32:forward_data_w_reg:out 
 forward_data_w_mux_sel : ex_dpath : wire
Connects down to:ff_se_2:for_w_flop:out , mux2_32:forward_data_w_mux:sel 
 forward_data_w_mux_sel_c : ex_ctl : wire
 forward_w_sel_din : ex : wire
Connects down to:ex_ctl:ex_ctl:forward_w_sel_din , ex_dpath:ex_dpath:forward_w_sel_din 
 forward_w_sel_din : ex_ctl : output
Connects up to:ex:ex_ctl:forward_w_sel_din 
 forward_w_sel_din : ex_dpath : input
Connects down to:ff_se_2:for_w_flop:din 
Connects up to:ex:ex_dpath:forward_w_sel_din 
 fourth_fill_cyc : ic_cntl : wire
Connects down to:mj_s_ff_snr_d:fourth_fill_cyc_flop:in 
 fourth_fill_cyc_d1 : ic_cntl : wire
Connects down to:mj_s_ff_snr_d:fourth_fill_cyc_flop:out 
 fpain : fpu : input
Connects down to:exponent:exp:aexpin , nxsign:nxs:asignin , mantissa:man:fpain 
 fpain : fpu_dummy : input
 fpain : fpu_mon : input
Connects up to:monitor:fpu_mon:fpain , monitor:fpu_mon:fpu 
 fpain : mantissa : input
Connects down to:mantissa_dp:i_mantissa_dp:fpain 
Connects up to:fpu:man:fpain 
 fpain : mantissa_dp : input
Connects down to:mj_s_mux4_d_32:a1pr_cyc0:in2 , mj_s_mux6_d_32:a0pre_mux:in4 
Connects up to:mantissa:i_mantissa_dp:fpain 
 fpain : monitor : wire
Connects down to:fpu_mon:fpu_mon:fpain 
 fpbin : fpu : input
Connects down to:exponent:exp:bexpin , code_seq:cs:top_fpbin , mantissa:man:fpbin 
 fpbin : fpu_dummy : input
 fpbin : fpu_mon : input
Connects up to:monitor:fpu_mon:fpbin , monitor:fpu_mon:fpu 
 fpbin : mantissa : input
Connects down to:mantissa_dp:i_mantissa_dp:fpbin 
Connects up to:fpu:man:fpbin 
 fpbin : mantissa_dp : input
Connects down to:mj_s_mux4_d_32:nb0_b:in2 , mj_s_mux4_d_32:nb0_a:in2 , mj_s_mux3_d_32:cyc0_mux:in1 , mj_s_mux3_d_32:cyc0_mux:in2 
Connects up to:mantissa:i_mantissa_dp:fpbin 
 fpbin : monitor : wire
Connects down to:fpu_mon:fpu_mon:fpbin 
 fpbusyn : code_seq : output
Connects down to:code_seq_cntl:p_code_seq_cntl:fpbusyn 
Connects up to:fpu:cs:fpbusyn 
 fpbusyn : code_seq_cntl : output
Connects down to:fpu_dec:fpud:fpbusyn 
Connects up to:code_seq:p_code_seq_cntl:fpbusyn 
 fpbusyn : fpu : output
Connects down to:code_seq:cs:fpbusyn 
 fpbusyn : fpu_dec : output
Connects up to:code_seq_cntl:fpud:fpbusyn 
 fpbusyn : fpu_dummy : output
 fpbusyn : fpu_mon : input
Connects up to:monitor:fpu_mon:fp_rdy_e 
 fphold : fpu : input
 fphold : fpu_dummy : input
 fphold : fpu_mon : input
Connects up to:monitor:fpu_mon:fphold , monitor:fpu_mon:fpu 
 fphold : monitor : wire
Connects down to:fpu_mon:fpu_mon:fphold 
 fpkill : acode_dec : input
Connects up to:code_seq_dp:acode:fpkill 
 fpkill : branch_dec : input
Connects up to:code_seq_cntl:branchd:fpkill 
 fpkill : code_seq : input
Connects down to:code_seq_cntl:p_code_seq_cntl:fpkill , code_seq_dp:p_code_seq_dp:fpkill 
Connects up to:fpu:cs:fpkill 
 fpkill : code_seq_cntl : input
Connects down to:fpu_dec:fpud:fpkill , branch_dec:branchd:fpkill 
Connects up to:code_seq:p_code_seq_cntl:fpkill 
 fpkill : code_seq_dp : input
Connects down to:acode_dec:acode:fpkill 
Connects up to:code_seq:p_code_seq_dp:fpkill 
 fpkill : fpu : input
Connects down to:code_seq:cs:fpkill 
 fpkill : fpu_dec : input
Connects down to:mj_s_mux2_d_8:fpumux:sel 
Connects up to:code_seq_cntl:fpud:fpkill 
 fpkill : fpu_dummy : input
 fpkill : fpu_mon : input
Connects up to:monitor:fpu_mon:fpkill , monitor:fpu_mon:fpu 
 fpkill : monitor : wire
Connects down to:fpu_mon:fpu_mon:fpkill 
 fpop : cpu : wire
Connects down to:iu:iu:opcode_1_op_r , FPU_MODULE:fpu:fpop 
 fpop : fpu : input
Connects down to:code_seq:cs:nx_opcode 
 fpop : fpu_dummy : input
 fpop : fpu_mon : input
Connects up to:monitor:fpu_mon:fpu , monitor:fpu_mon:fpop 
 fpop : monitor : wire
Connects down to:fpu_mon:fpu_mon:fpop 
 fpop_valid : code_seq_dp : wire
Connects down to:mj_s_ff_snre_d:ff_opvalid:out 
 fpop_valid : cpu : wire
Connects down to:iu:iu:valid_op_r , FPU_MODULE:fpu:fpop_valid 
 fpop_valid : fpu : input
Connects down to:code_seq:cs:nx_fpop_valid 
 fpop_valid : fpu_dummy : input
 fpop_valid : fpu_mon : input
Connects up to:monitor:fpu_mon:fpu , monitor:fpu_mon:fpop_valid 
 fpop_valid : monitor : wire
Connects down to:fpu_mon:fpu_mon:fpop_valid 
 fpout : fpu : output
Connects down to:mantissa:man:fpout 
 fpout : fpu_dummy : output
 fpout : fpu_mon : input
Connects up to:monitor:fpu_mon:fpu_data_e 
 fpout : mantissa : output
Connects down to:mantissa_dp:i_mantissa_dp:fpout 
Connects up to:fpu:man:fpout 
 fpout : mantissa_dp : output
Connects down to:mj_s_mux6_d_32:fpo:mx_out 
Connects up to:mantissa:i_mantissa_dp:fpout 
 fpu : monitor : wire (used in @posedge) (used in @negedge)
Connects down to:fpu_mon:fpu_mon:pj_clk , fpu_mon:fpu_mon:fpain , fpu_mon:fpu_mon:fpbin , fpu_mon:fpu_mon:fpop , fpu_mon:fpu_mon:fpkill , fpu_mon:fpu_mon:fphold , fpu_mon:fpu_mon:fpop_valid 
 fpuhold : code_seq : input
Connects down to:code_seq_cntl:p_code_seq_cntl:fpuhold , code_seq_dp:p_code_seq_dp:fpuhold 
Connects up to:fpu:cs:fpuhold 
 fpuhold : code_seq_cntl : input
Connects down to:fpu_dec:fpud:fpuhold , mj_s_ff_snre_d_6:conreg:lenable 
Connects up to:code_seq:p_code_seq_cntl:fpuhold 
 fpuhold : code_seq_dp : input
Connects up to:code_seq:p_code_seq_dp:fpuhold 
 fpuhold : exponent : input
Connects down to:exponent_cntl:p_exponent_cntl:fpuhold , exponent_dp:p_exponent_dp:fpuhold 
Connects up to:fpu:exp:fpuhold 
 fpuhold : exponent_cntl : input
Connects up to:exponent:p_exponent_cntl:fpuhold 
 fpuhold : exponent_dp : input
Connects up to:exponent:p_exponent_dp:fpuhold 
 fpuhold : fpu : wire
Connects down to:exponent:exp:fpuhold , incmod:inc:fpuhold , rsadd:rsa:fpuhold , prils:prif:fpuhold , code_seq:cs:fpuhold , nxsign:nxs:fpuhold , mantissa:man:fpuhold , multmod:mult1:fpuhold 
 fpuhold : fpu_dec : input
Connects down to:mj_s_ff_snre_d_8:ff_fpstate:lenable 
Connects up to:code_seq_cntl:fpud:fpuhold 
 fpuhold : incmod : input
Connects up to:fpu:inc:fpuhold 
 fpuhold : mantissa : input
Connects down to:mantissa_cntl:i_mantissa_cntl:fpuhold , mantissa_dp:i_mantissa_dp:fpuhold 
Connects up to:fpu:man:fpuhold 
 fpuhold : mantissa_cntl : input
Connects up to:mantissa:i_mantissa_cntl:fpuhold 
 fpuhold : mantissa_dp : input
Connects up to:mantissa:i_mantissa_dp:fpuhold 
 fpuhold : multmod : input
Connects down to:multmod_dp:p_multmod_dp:fpuhold 
Connects up to:fpu:mult1:fpuhold 
 fpuhold : multmod_dp : input
Connects up to:multmod:p_multmod_dp:fpuhold 
 fpuhold : nxsign : input
Connects up to:fpu:nxs:fpuhold 
 fpuhold : prils : input
Connects down to:prils_cntl:i_prils_cntl:fpuhold 
Connects up to:fpu:prif:fpuhold 
 fpuhold : prils_cntl : input
Connects down to:pri_dec:prid:fpuhold 
Connects up to:prils:i_prils_cntl:fpuhold 
 fpuhold : pri_dec : input
Connects up to:prils_cntl:prid:fpuhold 
 fpuhold : rsadd : input
Connects down to:rsadd_cntl:p_rsadd_cntl:fpuhold 
Connects up to:fpu:rsa:fpuhold 
 fpuhold : rsadd_cntl : input
Connects up to:rsadd:p_rsadd_cntl:fpuhold 
 fpuhold_l : code_seq_dp : wire
Connects down to:mj_s_ff_s_d:tff2:in , fp_roms:fprom_mod:rom_en , mj_s_ff_snre_d_64:mw:lenable , mj_s_ff_snre_d_8:ffopcode:lenable , mj_s_ff_snre_d:ff_opvalid:lenable , mj_s_ff_snre_d:ff_valid:lenable , mj_s_ff_snre_d:ff_valid_a:lenable , mj_s_ff_snre_d_4:link_mod:lenable 
 fpuhold_l : exponent_cntl : wire
Connects down to:exptop_dec:exptop:fpuhold_l 
 fpuhold_l : exponent_dp : wire
Connects down to:mj_s_ff_snre_d_16:ff_excon:lenable , mj_s_ff_snre_d_16:aex:lenable , mj_s_ff_snre_d_16:bex:lenable , mj_s_ff_snre_d_16:sax:lenable 
 fpuhold_l : exptop_dec : input
Connects down to:mj_s_ff_snre_d_2:mux1ad_ff:lenable 
Connects up to:exponent_cntl:exptop:fpuhold_l 
 fpuhold_l : incmod : wire
Connects down to:inc_decode:incdec:fpuhold_l , mj_s_ff_snre_d_32:q0reg:lenable , mj_s_ff_snre_d_32:q1reg:lenable 
 fpuhold_l : inc_decode : input
Connects down to:mj_s_ff_snre_d_2:t1mda_ff:lenable , mj_s_ff_snre_d_2:t0md_ff:lenable , mj_s_ff_snre_d_2:l0md_ff:lenable , mj_s_ff_snre_d_2:l1md_ff:lenable 
Connects up to:incmod:incdec:fpuhold_l 
 fpuhold_l : mantissa_cntl : wire
Connects down to:mj_s_ff_snre_d:a2reg:lenable 
 fpuhold_l : mantissa_dp : wire
Connects down to:mj_s_ff_snre_d_32:nta1:lenable , mj_s_ff_snre_d_32:nta0:lenable , mj_s_ff_snre_d_32:ntb1:lenable , mj_s_ff_snre_d_32:ntb0:lenable , mj_s_ff_snre_d_32:ff_r1out:lenable , mj_s_ff_snre_d_32:ff_r0out:lenable 
 fpuhold_l : multmod_dp : wire
Connects down to:mj_s_ff_snre_d_18:multdecout_moutselcntl:lenable , mj_s_ff_snre_d_28:ffsinlo:lenable , mj_s_ff_snre_d_28:ffcinlo:lenable , mj_s_ff_snre_d_28:ffsinhi:lenable , mj_s_ff_snre_d_28:ffcinhi:lenable , mult_array:marray:fpuhold_l , mult_add:madd:fpuhold_l , mj_s_ff_snre_d_6:mult_state:lenable 
 fpuhold_l : mult_add : input
Connects down to:mj_s_ff_snre_d_28:ffincsin:lenable , mj_s_ff_snre_d_6:muhold:lenable 
Connects up to:multmod_dp:madd:fpuhold_l 
 fpuhold_l : mult_array : input
Connects down to:mj_s_ff_snre_d_7:ffsavec0:lenable , mj_s_ff_snre_d_7:ffsaves0:lenable , mj_s_ff_snre_d_7:ffsaves1:lenable , mj_s_ff_snre_d_2:ffextra6c:lenable 
Connects up to:multmod_dp:marray:fpuhold_l 
 fpuhold_l : nxsign : wire
Connects down to:mj_s_ff_snre_d:abs:lenable , mj_s_ff_snre_d:abs1:lenable , mj_s_ff_snre_d:ead:lenable , mj_s_ff_snre_d:absig:lenable 
 fpuhold_l : pri_dec : wire
Connects down to:mj_s_ff_snre_d_2:m1_ff:lenable 
 fpuhold_l : rsadd_cntl : wire
Connects down to:mj_s_ff_snre_d_3:ff:lenable 
 fpu_data_e : cpu : wire
Connects down to:iu:iu:fpu_data_e , FPU_MODULE:fpu:fpout 
 fpu_data_e : ex : input
Connects down to:ex_dpath:ex_dpath:fpu_data_e 
Connects up to:iu:ex:fpu_data_e 
 fpu_data_e : ex_dpath : input
Connects down to:mux2_32:fpu_data_mux:in1 
Connects up to:ex:ex_dpath:fpu_data_e 
 fpu_data_e : iu : input
Connects down to:ex:ex:fpu_data_e 
Connects up to:cpu:iu:fpu_data_e 
 fpu_data_e : monitor : wire
Connects down to:fpu_mon:fpu_mon:fpout 
 fpu_hold : ex : input
Connects down to:ex_dpath:ex_dpath:fpu_hold 
Connects up to:iu:ex:hold_ex_fpu 
 fpu_hold : ex_dpath : input
Connects down to:ff_se_32:alu_out_c_reg:enable 
Connects up to:ex:ex_dpath:fpu_hold 
 fpu_inst_r : iu : wire
Connects down to:ex:ex:fpu_op_r , trap:trap:fpu_inst_r 
 fpu_inst_r : trap : input
Connects up to:iu:trap:fpu_inst_r 
 fpu_mux_sel : ex : wire
Connects down to:ex_ctl:ex_ctl:fpu_mux_sel , ex_dpath:ex_dpath:fpu_mux_sel 
 fpu_mux_sel : ex_ctl : output
Connects up to:ex:ex_ctl:fpu_mux_sel 
 fpu_mux_sel : ex_dpath : input
Connects down to:mux2_32:fpu_data_mux:sel , ff_se_32:alu_out_c_reg:enable 
Connects up to:ex:ex_dpath:fpu_mux_sel 
 fpu_op_e : ex_ctl : wire
Connects down to:ff_sre:fpop_reg:out 
 fpu_op_r : ex : output
Connects down to:ex_ctl:ex_ctl:fpu_op_r 
Connects up to:iu:ex:fpu_inst_r 
 fpu_op_r : ex_ctl : output
Connects down to:ff_sre:fpop_reg:din 
Connects up to:ex:ex_ctl:fpu_op_r 
 fpu_state : code_seq : output
Connects down to:code_seq_cntl:p_code_seq_cntl:fpu_state 
Connects up to:fpu:cs:fpu_state 
 fpu_state : code_seq_cntl : output
Connects down to:fpu_dec:fpud:fpu_state 
Connects up to:code_seq:p_code_seq_cntl:fpu_state 
 fpu_state : fpu : wire
Connects down to:code_seq:cs:fpu_state , mantissa:man:fpu_state 
 fpu_state : fpu_dec : output wire
Connects down to:mj_s_ff_snre_d_8:ff_fpstate:out 
Connects up to:code_seq_cntl:fpud:fpu_state 
 fpu_state : mantissa : input
Connects down to:mantissa_cntl:i_mantissa_cntl:fpu_state 
Connects up to:fpu:man:fpu_state 
 fpu_state : mantissa_cntl : input
Connects down to:mantissa_dec:mandec:fpu_state 
Connects up to:mantissa:i_mantissa_cntl:fpu_state 
 fpu_state : mantissa_dec : input
Connects up to:mantissa_cntl:mandec:fpu_state 
 fpu_unimp_c : trap : wire
Connects down to:ff_sre:fpu_c_reg:out 
 fpu_unimp_e : trap : wire
Connects down to:ff_sre:fpu_e_reg:out , ff_sre:fpu_c_reg:din 
 fpu_unimp_r : trap : wire
Connects down to:ff_sre:fpu_e_reg:din 
 fp_hold : hold_logic : wire
 fp_hold_d1 : hold_logic : wire
Connects down to:ff_sre:fphold_reg:out 
 fp_out_sel : mantissa : wire
Connects down to:mantissa_cntl:i_mantissa_cntl:fp_out_sel , mantissa_dp:i_mantissa_dp:fp_out_sel 
 fp_out_sel : mantissa_cntl : output
Connects down to:mantissa_dec:mandec:fp_out_sel 
Connects up to:mantissa:i_mantissa_cntl:fp_out_sel 
 fp_out_sel : mantissa_dec : output reg
Connects up to:mantissa_cntl:mandec:fp_out_sel 
 fp_out_sel : mantissa_dp : input
Connects down to:mj_s_mux6_d_32:fpo:sel 
Connects up to:mantissa:i_mantissa_dp:fp_out_sel 
 fp_rdy_e : cpu : wire
Connects down to:iu:iu:fp_rdy_e , FPU_MODULE:fpu:fpbusyn 
 fp_rdy_e : hold_logic : input
Connects down to:ff_sre:fphold_reg:din 
Connects up to:iu:hold_logic:fp_rdy_e 
 fp_rdy_e : iu : input
Connects down to:hold_logic:hold_logic:fp_rdy_e 
Connects up to:cpu:iu:fp_rdy_e 
 fp_rdy_e : monitor : wire
Connects down to:fpu_mon:fpu_mon:fpbusyn 
 frame : display_picoJavaII : reg
 frame : ucode_monitor : input
Connects up to:monitor:ucode_monitor:ex_regs , monitor:ucode_monitor:frame_w , monitor:ucode_monitor:ex , monitor:ucode_monitor:iu 
 frame_out : ex_regs : wire
Connects down to:ff_se_30:frame_reg:out , mux21_32:reg_rd_mux:in2 , mux7_32:ucode_reg_data_mux:in2 , ff_s_32:frame_w_reg:din 
 frame_w : ex_regs : wire
Connects down to:ff_s_32:frame_w_reg:out 
 frame_w : monitor : wire
Connects down to:ucode_monitor:ucode_monitor:frame 
 frem : ex_ctl : wire
 freturn : ex_ctl : wire
 fstore : ex_ctl : wire
 fstore : rs1_dec : reg
 fstore : rsd_dec : wire
 fstore_0 : ex_ctl : wire
 fstore_0 : rs1_dec : reg
 fstore_1 : ex_ctl : wire
 fstore_1 : rs1_dec : reg
 fstore_1 : rsd_dec : wire
 fstore_2 : ex_ctl : wire
 fstore_2 : rs1_dec : reg
 fstore_2 : rsd_dec : wire
 fstore_3 : ex_ctl : wire
 fstore_3 : rs1_dec : reg
 fstore_3 : rsd_dec : wire
 fsub : ex_ctl : wire
 func_do : dcache_ram0_LocalBist : input
Connects up to:dcram_top:dcache_ram0_Bist_Ins:int_do0 
 func_do : dcache_ram1_LocalBist : input
Connects up to:dcram_top:dcache_ram1_Bist_Ins:int_do1 
 func_do : rrdtag_0_LocalBist : input
Connects up to:dtag_top:rrdtag_0_Bist_Ins:int_do0 
 func_do : rrdtag_1_LocalBist : input
Connects up to:dtag_top:rrdtag_1_Bist_Ins:int_do1 
 func_do : rricache_LocalBist : input
Connects up to:icram_top:rricache_Bist_Ins:int_do 
 func_do : rritag_LocalBist : input
Connects up to:itag_top:rritag_Bist_Ins:itag_dout , itag_top:rritag_Bist_Ins:itag_vld 
 func_doa : rr512x5_LocalBist : input
Connects up to:dtag_top:rr512x5_Bist_Ins:stat_out 
 fxx : ucode_reg : wire
Connects down to:mux2_32:ie_stall_ucode_data0_mux:in0 , mux2_32:ie_stall_ucode_data1_mux:in0 , mux2_16:ie_stall_ucode_data2_mux:in0 
 fxx_default : ucode_reg : wire
Connects down to:mux2_32:nxt_u_fxx0_mux:in1 , mux2_32:nxt_u_fxx1_mux:in1 , mux2_16:nxt_u_fxx2_mux:in1 
ABCDEFGHIJKLMNOPQRSTUVWXYZ
Next PageHierarchyFilesModulesSignalsTasksFunctionsHelp
This page: Created:Wed Mar 24 09:42:43 1999
Verilog converted to html by v2html 5.0 (written by Costas Calamvokis).Help