9'd211:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f12 = `F12_SEL_RS2_B0;
f14 = `F14_WT_REG6_B0;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd212:begin
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_R6_CACHE;
f01 = `F01_WT_R236_STK;
f18 = `F18_U_LAST;
end
// ======= end of "dup2" =========================================
// ---- 9'd1 ~ 5 of "dup2_x1" --------------- Offset 9'd212 ----
// ------- start "dup2_x1" ---------------------------------------
9'd213:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f19 = `F19_SEL_OPTOP_MA;
f20 = `F20_MB_CONST_20;
f21 = `F21_MADD_pApB;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG0_A;
f12 = `F12_SEL_RS2_B0;
f14 = `F14_WT_REG6_B0;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd214:begin
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f02 = `F02_RD_STK_REG0;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG3_A;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_R6_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd215:begin
f06 = `F06_A_CONST_12;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f19 = `F19_SEL_OPTOP_MA;
f20 = `F20_MB_CONST_16;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd216:begin
f13 = `F13_SEL_PASS_A_B1;
f15 = `F15_WT_AREG0_B1;
f16 = `F16_SEL_R3_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd217:begin
f16 = `F16_SEL_R6_CACHE;
f01 = `F01_WT_R236_STK;
f18 = `F18_U_LAST;
end
// ======= end of "dup2_x1" ======================================
// ---- 9'd1 ~ 6 of "dup2_x2" --------------- Offset 9'd217 ----
// ------- start "dup2_x2" ---------------------------------------
9'd218:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f19 = `F19_SEL_OPTOP_MA;
f20 = `F20_MB_CONST_20;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG0_A;
f12 = `F12_SEL_RS2_B0;
f14 = `F14_WT_REG6_B0;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd219:begin
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f02 = `F02_RD_STK_REG0;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG3_A;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_R6_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd220:begin
f06 = `F06_A_CONST_12;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG0_A;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd221:begin
f19 = `F19_SEL_OPTOP_MA;
f20 = `F20_MB_CONST_16;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK_REG0;
f16 = `F16_SEL_R3_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd222:begin
f13 = `F13_SEL_PASS_A_B1;
f15 = `F15_WT_AREG0_B1;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd223:begin
f16 = `F16_SEL_R6_CACHE;
f01 = `F01_WT_R236_STK;
f18 = `F18_U_LAST;
end
// ======= end of "dup2_x2" ======================================
// ---- 9'd1 ~ 2 of "swap" ------------------ Offset 9'd223 ----
// ------- start "swap" ------------------------------------------
9'd224:begin
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f12 = `F12_SEL_RS2_B0;
f14 = `F14_WT_REG6_B0;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd225:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_R6_CACHE;
f01 = `F01_WT_R236_STK;
f18 = `F18_U_LAST;
end
// ======= end of "swap" =========================================
// ---- 9'd1 ~ 1 of "ldc_quick" ------------- Offset 9'd225 ----
// ------- start "ldc_quick" -------------------------------------
9'd226:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I8_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG2_A;
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f18 = `F18_U_LAST;
end
// ======= end of "ldc_quick" ====================================
// ---- 9'd1 ~ 1 of "ldc_w_quick" ----------- Offset 9'd226 ----
// ------- start "ldc_w_quick" -----------------------------------
9'd227:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG2_A;
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f18 = `F18_U_LAST;
end
// ======= end of "ldc_w_quick" ==================================
// ---- 9'd1 ~ 2 of "ldc2_w_quick" ---------- Offset 9'd227 ----
// ------- start "ldc2_w_quick" ----------------------------------
9'd228:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG2_A;
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
end
9'd229:begin
f16 = `F16_SEL_R2_CACHE;
f19 = `F19_SEL_PORTC_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f18 = `F18_U_LAST;
end
// ======= end of "ldc2_w_quick" =================================
// ---- 9'd1 ~1/4 of "get_field_quick" ------- Offset 9'd229 ----
// ------- start "get_field_quick" -------------------------------
9'd230:begin
f19 = `F19_SEL_RS1_MA_M2;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG0_A;
f08 = `F08_RD_RS1_A;
f00 = `F00_RS1_COMP_ZERO;
f18 = `F18_CHK_NULL | `F18_CHK_1CYC_DONE;
end
9'd231:begin
f19 = `F19_SEL_RS1_MA_M2;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd232:begin
f08 = `F08_RD_REG0_A;
f09 = `F09_RD_AREG0_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pAsB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd233:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_SEL_DCACHE_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f18 = `F18_U_LAST;
end
// ======= end of "get_field_quick" ==============================
// ---- 9'd1 ~1/4 of "put_field_quick" ------- Offset 9'd233 ----
// ------- start "put_field_quick" -------------------------------
9'd234:begin
f19 = `F19_SEL_RS2_MA_M2;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG0_A;
f08 = `F08_RD_RS2_A;
f00 = `F00_RS2_COMP_ZERO;
f18 = `F18_CHK_NULL | `F18_CHK_1CYC_DONE;
end
9'd235:begin
f19 = `F19_SEL_RS2_MA_M2;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd236:begin
f08 = `F08_RD_REG0_A;
f09 = `F09_RD_AREG0_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pAsB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd237:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_SEL_DCACHE_MB;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
f18 = `F18_U_LAST;
end
// ======= end of "put_field_quick" ==============================
// ---- 9'd1 ~2/5 of "get_field2_quick" ------ Offset 9'd237 ----
// ------- start "get_field2_quick" ------------------------------
9'd238:begin
f19 = `F19_SEL_RS1_MA_M2;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG0_A;
f08 = `F08_RD_RS1_A;
f00 = `F00_RS1_COMP_ZERO;
f18 = `F18_CHK_NULL | `F18_CHK_HANDLE2 | `F18_CHK_ABT_RDWT;
end
9'd239:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f22 = `F22_SEL_IALU;
f18 = `F18_U_LAST;
end
9'd240:begin
f19 = `F19_SEL_RS1_MA_M2;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd241:begin
f08 = `F08_RD_REG0_A;
f09 = `F09_RD_AREG0_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pAsB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd242:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_SEL_DCACHE_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd243:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f18 = `F18_U_LAST;
end
// ======= end of "get_field2_quick" =============================
// ---- 9'd1 ~3/5 of "put_field2_quick" ------ Offset 9'd243 ----
// ------- start "put_field2_quick" ------------------------------
9'd244:begin
f19 = `F19_SEL_RS2_MA_M2;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_sApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG0_A;
f08 = `F08_RD_RS2_A;
f00 = `F00_RS2_COMP_ZERO;
f18 = `F18_CHK_NULL | `F18_CHK_HANDLE_P | `F18_CHK_ABT_RDWT;
end
9'd245:begin
f13 = `F13_SEL_PASS_A_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
end
9'd246:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
f18 = `F18_U_LAST;
end
9'd247:begin
f19 = `F19_SEL_RS2_MA_M2;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG3_A;
end
9'd248:begin
f08 = `F08_RD_REG0_A;
f09 = `F09_RD_AREG0_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pAsB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd249:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_SEL_DCACHE_MB;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_R3_CACHE;
f03 = `F03_WT_DCACHE;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd250:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
f18 = `F18_U_LAST;
end
// ======= end of "put_field2_quick" =============================
// ---- 9'd1 ~ 3 of "getstatic_quick" ------- Offset 9'd250 ----
// ------- start "get_static_quick" ------------------------------
9'd251:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
end
9'd252:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd253:begin
f19 = `F19_SEL_DCACHE_MA2;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f18 = `F18_U_LAST;
end
// ======= end of "get_static_quick" =============================
// ---- 9'd1 ~ 3 of "put_static_quick" ------ Offset 9'd253 ----
// ------- start "put_static_quick" ------------------------------
9'd254:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
end
9'd255:begin
end
9'd256:begin
f19 = `F19_SEL_DCACHE_MA2;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
f18 = `F18_U_LAST;
end
// ======= end of "put_static_quick" =============================
// ---- 9'd1 ~ 4 of "get_static2_quick" ----- Offset 9'd256 ----
// ------- start "get_static2_quick" -----------------------------
9'd257:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
end
9'd258:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd259:begin
f19 = `F19_SEL_DCACHE_MA2;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG2_A;
end
9'd260:begin
f16 = `F16_SEL_R2_CACHE;
f19 = `F19_SEL_PORTC_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f18 = `F18_U_LAST;
end
// ======= end of "get_static2_quick" ============================
// ---- 9'd1 ~ 4 of "put_static2_quick" ----- Offset 9'd260 ----
// ------- start "put_static2_quick" -----------------------------
9'd261:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f12 = `F12_SEL_RS2_B0;
f14 = `F14_WT_REG6_B0;
end
9'd262:begin
end
9'd263:begin
f19 = `F19_SEL_DCACHE_MA2;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
end
9'd264:begin
f19 = `F19_SEL_DCACHE_MA2;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_R6_CACHE;
f03 = `F03_WT_DCACHE;
f18 = `F18_U_LAST;
end
// ======= end of "put_static2_quick" ============================
// ---- 9'd1 ~ 4 of "aput_field_quick" ------ Offset 9'd264 ----
// ------- start "aput_field_quick" ------------------------------
9'd265:begin
f19 = `F19_SEL_RS2_MA_M2;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG0_A;
f08 = `F08_RD_RS2_A;
f09 = `F09_RD_RS1_B;
f04 = `F04_RD_GC_CONF;
f00 = `F00_RS2_COMP_ZERO;
f18 = `F18_CHK_NULL | `F18_CHK_1CYC_DONE | `F18_CHK_GC;
end
9'd266:begin
f19 = `F19_SEL_RS2_MA_M2;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd267:begin
f08 = `F08_RD_REG0_A;
f09 = `F09_RD_AREG0_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pAsB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd268:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_SEL_DCACHE_MB;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
f18 = `F18_U_LAST;
end
// ======= end of "aput_field_quick" =============================
// ---- 9'd1 ~ 3 of "aput_static_quick" ----- Offset 9'd268 ----
// ------- start "aput_static_quick" -----------------------------
9'd269:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f12 = `F12_SEL_RS2_B0;
f14 = `F14_WT_REG6_B0;
end
9'd270:begin
end
9'd271:begin
f19 = `F19_SEL_DCACHE_MA2;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f16 = `F16_SEL_RS1_CACHE;
f03 = `F03_WT_DCACHE;
f08 = `F08_RD_DCACHE_A;
f09 = `F09_RD_RS1_B;
f04 = `F04_RD_GC_CONF;
f18 = `F18_U_LAST | `F18_CHK_GC;
end
// ======= end of "aput_static_quick" ============================
// ---- 9'd1 ~ 8 of "priv_ret_from_trap" ---- Offset 9'd271 ----
// ------- start "priv_ret_from_trap" ----------------------------
9'd272:begin
f06 = `F06_A_CONST_12;
f04 = `F04_RD_FRAME;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_ARCH;
f17 = `F17_IALU_sApB;
f10 = `F10_SEL_ALU_A;
f11 = `F11_WT_REG1_A;
end
9'd273:begin
f04 = `F04_RD_FRAME;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_OPTOP;
end
9'd274:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pAsB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
end
9'd275:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_PC;
end
9'd276:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_FRAME;
end
9'd277:begin
f02 = `F02_RD_STK;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG1_A;
f05 = `F05_WT_V_OPTOP;
end
9'd278:begin
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_VARS;
end
9'd279:begin
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_PSR;
f18 = `F18_U_LAST;
end
// ======= end of "priv_ret_from_trap" ===========================
// ---- 9'd1 ~ 5 of "iu_trap_r" ------------- Offset 9'd279 ----
// ------- start "iu_trap_r" -------------------------------------
9'd280:begin
f06 = `F06_A_CONST_16;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f04 = `F04_RD_PC;
f19 = `F19_SEL_ARCH_MA;
This page: |
Created: | Wed Mar 24 09:43:51 1999 |
| From: |
/import/jet-pj2-sim/rahim/picoJava-II/design/iu/ucode/rtl/ucode_rom.v
|