9'd136:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_PC;
end
9'd137:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pAsB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_FRAME;
end
9'd138:begin
f02 = `F02_RD_STK;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG1_A;
f05 = `F05_WT_V_OPTOP;
end
9'd139:begin
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_VARS;
end
9'd140:begin
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_CONST_P;
f18 = `F18_U_LAST;
end
// ======= end of "return" =======================================
// ---- 9'd1 ~ 8 of ireturn ----------------- Offset 9'd140 ----
// ------- start "ireturn" ---------------------------------------
9'd141:begin
f06 = `F06_A_CONST_16;
f04 = `F04_RD_FRAME;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_ARCH;
f17 = `F17_IALU_sApB;
f10 = `F10_SEL_ALU_A;
f11 = `F11_WT_REG1_A;
end
9'd142:begin
f04 = `F04_RD_FRAME;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG2_A;
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_OPTOP;
end
9'd143:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pAsB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
end
9'd144:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_PC;
end
9'd145:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pAsB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f06 = `F06_A_CONST_04;
f04 = `F04_RD_VARS;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_ARCH;
f17 = `F17_IALU_sApB;
f12 = `F12_SEL_ALU_B0;
f14 = `F14_WT_REG5_B0;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_FRAME;
end
9'd146:begin
f06 = `F06_A_CONST_04;
f09 = `F09_RD_REG5_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG1_A;
f08 = `F08_RD_REG5_A;
f05 = `F05_WT_A_OPTOP;
end
9'd147:begin
f16 = `F16_SEL_R2_CACHE;
f01 = `F01_WT_R236_STK;
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_VARS;
end
9'd148:begin
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_CONST_P;
f18 = `F18_U_LAST;
end
// ======= end of "ireturn" ======================================
// ---- 9'd1 ~ 8 of lreturn ----------------- Offset 9'd148 ----
// ------- start "lreturn" ---------------------------------------
9'd149:begin
f06 = `F06_A_CONST_16;
f04 = `F04_RD_FRAME;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_ARCH;
f17 = `F17_IALU_sApB;
f10 = `F10_SEL_ALU_A;
f11 = `F11_WT_REG1_A;
end
9'd150:begin
f04 = `F04_RD_FRAME;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG2_A;
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_OPTOP;
end
9'd151:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pAsB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f10 = `F10_SEL_RS2_A;
f11 = `F11_WT_REG3_A;
end
9'd152:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_PC;
end
9'd153:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pAsB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f06 = `F06_A_CONST_08;
f04 = `F04_RD_VARS;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_ARCH;
f17 = `F17_IALU_sApB;
f12 = `F12_SEL_ALU_B0;
f14 = `F14_WT_REG5_B0;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_FRAME;
end
9'd154:begin
f06 = `F06_A_CONST_04;
f09 = `F09_RD_REG5_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG1_A;
f08 = `F08_RD_REG5_A;
f05 = `F05_WT_A_OPTOP;
end
9'd155:begin
f06 = `F06_A_CONST_04;
f09 = `F09_RD_AREG0_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f16 = `F16_SEL_R2_CACHE;
f01 = `F01_WT_R236_STK;
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_VARS;
end
9'd156:begin
f16 = `F16_SEL_R3_CACHE;
f01 = `F01_WT_R236_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_CONST_P;
f18 = `F18_U_LAST;
end
// ======= end of "lreturn" ======================================
// ---- 9'd1 ~ 3 of call -------------------- Offset 9'd156 ----
// ------- start "call" ------------------------------------------
9'd157:begin
f23 = `F23_SEL_RS1_LH2_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f12 = `F12_SEL_ALU_B0;
f14 = `F14_WT_REG5_B0;
f04 = `F04_RD_PC;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_MB_CONST_02;
f21 = `F21_MADD_pApB;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG2_A;
f08 = `F08_RD_RS2_A;
f05 = `F05_WT_A_PC;
end
9'd158:begin
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f01 = `F01_WT_VARS_STK;
f08 = `F08_RD_REG5_A;
f05 = `F05_WT_A_VARS;
end
9'd159:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_R2_CACHE;
f01 = `F01_WT_R236_STK;
f18 = `F18_U_LAST;
end
// ======= end of "call" =========================================
// ---- 9'd1 ~ 4 of return0 ----------------- Offset 9'd159 ----
// ------- start "return0" ---------------------------------------
9'd160:begin
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_PC;
end
9'd161:begin
f05 = `F05_WT_V_OPTOP;
end
9'd162:begin
f08 = `F08_RD_RS2_A;
f05 = `F05_WT_A_VARS;
end
9'd163:begin
f18 = `F18_U_LAST;
end
// ======= end of "return0" ======================================
// ---- 9'd1 ~ 4 of return1 ----------------- Offset 9'd163 ----
// ------- start "return1" ---------------------------------------
9'd164:begin
f06 = `F06_A_CONST_12;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f04 = `F04_RD_VARS;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pAsB;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG1_A;
f08 = `F08_RD_RS2_A;
f05 = `F05_WT_A_PC;
end
9'd165:begin
f06 = `F06_A_CONST_00;
f04 = `F04_RD_VARS;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_ARCH;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG2_A;
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_OPTOP;
end
9'd166:begin
f16 = `F16_SEL_R2_CACHE;
f01 = `F01_WT_R236_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_VARS;
end
9'd167:begin
f18 = `F18_U_LAST;
end
// ======= end of "return1" ======================================
// ---- 9'd1 ~ 5 of return2 ----------------- Offset 9'd167 ----
// ------- start "return2" ---------------------------------------
9'd168:begin
f06 = `F06_A_CONST_12;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f04 = `F04_RD_VARS;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pAsB;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG1_A;
end
9'd169:begin
f06 = `F06_A_CONST_04;
f09 = `F09_RD_AREG0_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG2_A;
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_OPTOP;
end
9'd170:begin
f06 = `F06_A_CONST_04;
f04 = `F04_RD_VARS;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_ARCH;
f17 = `F17_IALU_sApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_PC;
end
9'd171:begin
f06 = `F06_A_CONST_04;
f09 = `F09_RD_AREG0_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f10 = `F10_SEL_RS2_A;
f11 = `F11_WT_REG2_A;
f16 = `F16_SEL_R2_CACHE;
f01 = `F01_WT_R236_STK;
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_VARS;
end
9'd172:begin
f16 = `F16_SEL_R2_CACHE;
f01 = `F01_WT_R236_STK;
f18 = `F18_U_LAST;
end
// ======= end of "return2" ======================================
// ---- 9'd1 ~ 12 of tableswitch ------------- Offset 9'd172 ----
// ------- start "tableswitch" -----------------------------------
9'd173:begin
f06 = `F06_A_CONST_04;
f04 = `F04_RD_PC;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_ARCH_M2;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG1_A;
end
9'd174:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
end
9'd175:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd176:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f08 = `F08_RD_REG1_A;
f09 = `F09_RD_DCACHE_B;
f06 = `F06_A_U_PORTA;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pApB;
f10 = `F10_SEL_ALU_A;
f11 = `F11_WT_REG0_A;
end
9'd177:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f08 = `F08_RD_DCACHE_A;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_RS1;
f17 = `F17_IALU_sApB;
f10 = `F10_SEL_ALU_A;
f11 = `F11_WT_REG2_A;
f12 = `F12_SEL_DCACHE_B0;
f14 = `F14_WT_REG5_B0;
end
9'd178:begin
f16 = `F16_SEL_R2_CACHE;
f19 = `F19_SEL_PORTC_MA;
f20 = `F20_SEL_PORTC_MB;
f21 = `F21_MADD_pApB;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG2_A;
f08 = `F08_RD_REG0_A;
f05 = `F05_WT_A_PC;
end
9'd179:begin
f19 = `F19_SEL_AREG0_MA;
f16 = `F16_SEL_R2_CACHE;
f20 = `F20_SEL_PORTC_MB;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f09 = `F09_RD_RS1_B;
f08 = `F08_RD_REG5_A;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_RS1;
f17 = `F17_IALU_sApB;
f18 = `F18_CHK_LS_BRANCH1;
end
9'd180:begin
f19 = `F19_SEL_AREG0_MA;
f16 = `F16_SEL_R2_CACHE;
f20 = `F20_SEL_PORTC_MB;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f09 = `F09_RD_RS1_B;
f08 = `F08_RD_DCACHE_A;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_RS1;
f17 = `F17_IALU_pAsB;
f18 = `F18_CHK_LS_BRANCH2;
end
9'd181:begin
f19 = `F19_SEL_AREG0_MA;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
end
9'd182:begin
end
9'd183:begin
f08 = `F08_RD_REG1_A;
f09 = `F09_RD_DCACHE_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pApB;
f10 = `F10_SEL_ALU_A;
f11 = `F11_WT_REG1_A;
end
9'd184:begin
f08 = `F08_RD_REG1_A;
f05 = `F05_WT_A_PC;
f18 = `F18_U_LAST;
end
// ======= end of "tableswitch" ==================================
// ---- 9'd1 ~ 6 of checkcast_quick --------- Offset 9'd184 ----
// ------- start "checkcast_quick" -------------------------------
9'd185:begin
f19 = `F19_SEL_RS1_MA_M2;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f00 = `F00_RS1_COMP_ZERO;
f18 = `F18_CHK_EQ_BRANCH;
end
9'd186:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
end
9'd187:begin
f19 = `F19_SEL_DCACHE_MA3;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pAsB;
f03 = `F03_RD_DCACHE;
end
9'd188:begin
f10 = `F10_SEL_DCACHE_A;
f11 = `F11_WT_REG0_A;
end
9'd189:begin
f08 = `F08_RD_REG0_A;
f09 = `F09_RD_DCACHE_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pAsB;
f12 = `F12_SEL_ALU_B0;
f14 = `F14_WT_REG5_B0;
end
9'd190:begin
f08 = `F08_RD_REG5_A;
f00 = `F00_A_COMP_ZERO;
f18 = `F18_U_LAST | `F18_CHK_PTR_TRAP;
end
// ======= end of "checkcast_quick" ==============================
// ---- 9'd1 ~ 7 of instanceof_quick -------- Offset 9'd190 ----
// ------- start "instanceof_quick" ------------------------------
9'd191:begin
f19 = `F19_SEL_RS1_MA_M2;
f20 = `F20_MB_CONST_00;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f00 = `F00_RS1_COMP_ZERO;
f18 = `F18_CHK_EQ_BRANCH;
end
9'd192:begin
f04 = `F04_RD_CONST_P;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_RD_I16_LSH2_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
end
9'd193:begin
f19 = `F19_SEL_DCACHE_MA3;
f20 = `F20_MB_CONST_08;
f21 = `F21_MADD_pAsB;
f03 = `F03_RD_DCACHE;
f06 = `F06_A_CONST_01;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_CONST_00;
f17 = `F17_IALU_pApB;
f10 = `F10_SEL_ALU_A;
f11 = `F11_WT_REG2_A;
end
9'd194:begin
f10 = `F10_SEL_DCACHE_A;
f11 = `F11_WT_REG0_A;
end
9'd195:begin
f08 = `F08_RD_REG0_A;
f09 = `F09_RD_DCACHE_B;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_U_PORTB;
f17 = `F17_IALU_pAsB;
f12 = `F12_SEL_ALU_B0;
f14 = `F14_WT_REG5_B0;
end
9'd196:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
f08 = `F08_RD_REG5_A;
f00 = `F00_A_COMP_ZERO;
f18 = `F18_CHK_PTR_TRAP;
end
9'd197:begin
f16 = `F16_SEL_R2_CACHE;
f01 = `F01_WT_R236_STK;
f18 = `F18_U_LAST;
end
// ======= end of "instanceof_quick" =============================
// ---- 9'd1 ~ 3 of "exit_sync_method" ------ Offset 9'd197 ----
// ------- start "exit_sync_method" ------------------------------
9'd198:begin
f04 = `F04_RD_FRAME;
f19 = `F19_SEL_ARCH_MA;
f20 = `F20_MB_CONST_20;
f21 = `F21_MADD_pAsB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd199:begin
f22 = `F22_SEL_AREG0;
f02 = `F02_RD_STK;
end
9'd200:begin
f08 = `F08_RD_RS1_A;
f05 = `F05_WT_A_PC;
f18 = `F18_U_LAST;
end
// ======= end of "exit_sync_method" =============================
// ---- 9'd1 ~ 3 of get_current_class ------- Offset 9'd200 ----
// ------- start "get_current_class" -----------------------------
9'd201:begin
f06 = `F06_A_CONST_16;
f04 = `F04_RD_FRAME;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_ARCH;
f17 = `F17_IALU_sApB;
f13 = `F13_SEL_ALU_B1;
f15 = `F15_WT_AREG0_B1;
end
9'd202:begin
f19 = `F19_SEL_OPTOP_MA;
f20 = `F20_MB_CONST_04;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK;
f06 = `F06_A_CONST_32;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_CONST_00;
f17 = `F17_IALU_pApB;
f10 = `F10_SEL_ALU_A;
f11 = `F11_WT_REG2_A;
end
9'd203:begin
f19 = `F19_SEL_RS1_MA;
f16 = `F16_SEL_R2_CACHE;
f20 = `F20_SEL_PORTC_MB;
f21 = `F21_MADD_pApB;
f03 = `F03_RD_DCACHE;
f01 = `F01_WT_DREG_STK;
f18 = `F18_U_LAST;
end
// ======= end of "get_current_class" ============================
// ---- 9'd1 ~ 3 of "dup_x1 " --------------- Offset 9'd203 ----
// ------- start "dup_x1" ----------------------------------------
9'd204:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f12 = `F12_SEL_RS2_B0;
f14 = `F14_WT_REG6_B0;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd205:begin
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f19 = `F19_SEL_OPTOP_MA;
f20 = `F20_MB_CONST_12;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_R6_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd206:begin
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
f18 = `F18_U_LAST;
end
// ======= end of "dup_x1" =======================================
// ---- 9'd1 ~ 4 of "dup_x2 " --------------- Offset 9'd206 ----
// ------- start "dup_x2" ----------------------------------------
9'd207:begin
f06 = `F06_A_CONST_04;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f19 = `F19_SEL_OPTOP_MA;
f20 = `F20_MB_CONST_16;
f21 = `F21_MADD_pApB;
f10 = `F10_SEL_MA_A;
f11 = `F11_WT_REG0_A;
f12 = `F12_SEL_RS2_B0;
f14 = `F14_WT_REG6_B0;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd208:begin
f06 = `F06_A_CONST_08;
f23 = `F23_SEL_IALU_A;
f07 = `F07_B_OPTOP;
f17 = `F17_IALU_pApB;
f19 = `F19_SEL_OPTOP_MA;
f20 = `F20_MB_CONST_12;
f21 = `F21_MADD_pApB;
f13 = `F13_SEL_MA_B1;
f15 = `F15_WT_AREG0_B1;
f02 = `F02_RD_STK_REG0;
f10 = `F10_SEL_RS1_A;
f11 = `F11_WT_REG3_A;
f22 = `F22_SEL_IALU;
f16 = `F16_SEL_R6_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd209:begin
f13 = `F13_SEL_PASS_A_B1;
f15 = `F15_WT_AREG0_B1;
f16 = `F16_SEL_RS1_CACHE;
f01 = `F01_WT_R236_STK;
end
9'd210:begin
f16 = `F16_SEL_R3_CACHE;
f01 = `F01_WT_R236_STK;
f18 = `F18_U_LAST;
end
// ======= end of "dup_x2" =======================================
// ---- 9'd1 ~ 2 of "dup2" ------------------ Offset 9'd210 ----
// ------- start "dup2" ------------------------------------------
This page: |
Created: | Wed Mar 24 09:43:50 1999 |
| From: |
/import/jet-pj2-sim/rahim/picoJava-II/design/iu/ucode/rtl/ucode_rom.v
|