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		((opcode_int[15:8] == 8'd57) & second_cyc) |	// dstore
		((opcode_int[15:8] == 8'd63) & second_cyc) |	// lstore_0
		((opcode_int[15:8] == 8'd64) & second_cyc) |	// lstore_1
		((opcode_int[15:8] == 8'd65) & second_cyc) |	// lstore_2
		((opcode_int[15:8] == 8'd66) & second_cyc) |	// lstore_3
		((opcode_int[15:8] == 8'd71) & second_cyc) |	// dstore_0
		((opcode_int[15:8] == 8'd72) & second_cyc) |	// dstore_1
		((opcode_int[15:8] == 8'd73) & second_cyc) |	// dstore_2
		((opcode_int[15:8] == 8'd74) & second_cyc) |	// dstore_3
		(opcode_int[15:8] == 8'd88) |			// pop2
		((opcode_int[15:8] == 8'd97) & second_cyc) |	// ladd
		((opcode_int[15:8] == 8'd99) & second_cyc) |	// dadd
		((opcode_int[15:8] == 8'd101) & second_cyc) |	// lsub
		((opcode_int[15:8] == 8'd103) & second_cyc) |	// dsub
		((opcode_int[15:8] == 8'd107) & second_cyc) |	// dmul
		((opcode_int[15:8] == 8'd111) & second_cyc) |	// ddiv
		((opcode_int[15:8] == 8'd115) & second_cyc) |	// drem
		((opcode_int[15:8] == 8'd127) & second_cyc) |	// land
		((opcode_int[15:8] == 8'd129) & second_cyc) |	// lor
		((opcode_int[15:8] == 8'd131) & second_cyc) |	// lxor
		(opcode_int[15:8] == 8'd159) |			// if_icmpeq
		(opcode_int[15:8] == 8'd160) |			// if_icmpne
		(opcode_int[15:8] == 8'd161) |			// if_icmplt
		(opcode_int[15:8] == 8'd162) |			// if_icmpge
		(opcode_int[15:8] == 8'd163) |			// if_icmpgt
		(opcode_int[15:8] == 8'd164) |			// if_icmple
		(opcode_int[15:8] == 8'd165) |			// if_icmpeq
		(opcode_int[15:8] == 8'd166) |			// if_icmpne
		(opcode_int[15:8] == 8'd173) |			// lreturn
		(opcode_int[15:8] == 8'd175) |			// dreturn
		(opcode_int[15:8] == 8'd207) |			// putfield_quick
		(opcode_int[15:8] == 8'd213) |			// putstatic2_quick
		(opcode_int[15:8] == 8'd231) |			// aputfield_quick
		(ext_opcode & (opcode_int[7:0] == 8'd32)) |	// store_byte
		(ext_opcode & (opcode_int[7:0] == 8'd34)) |	// store_short
		(ext_opcode & (opcode_int[7:0] == 8'd36)) |	// store_word
		(ext_opcode & (opcode_int[7:0] == 8'd38)) |	// priv_write_dcache_tag
		(ext_opcode & (opcode_int[7:0] == 8'd39)) |	// priv_write_dcache_data
		(ext_opcode & (opcode_int[7:0] == 8'd42)) |	// store_short_oe
		(ext_opcode & (opcode_int[7:0] == 8'd44)) |	// store_word_oe
		(ext_opcode & (opcode_int[7:0] == 8'd46)) |	// priv_write_icache_tag
		(ext_opcode & (opcode_int[7:0] == 8'd47)) |	// priv_write_icache_data
		(ext_opcode & (opcode_int[7:0] == 8'd48)) |	// ncstore_byte
		(ext_opcode & (opcode_int[7:0] == 8'd50)) |	// ncstore_short
		(ext_opcode & (opcode_int[7:0] == 8'd52)) |	// ncstore_word
		(ext_opcode & (opcode_int[7:0] == 8'd58)) |	// ncstore_short_oe
		(ext_opcode & (opcode_int[7:0] == 8'd60)) 	// ncstore_word_oe
	);

assign	inc_optop_3 = (

		(opcode_int[15:8] == 8'd79) |			// iastore
		(opcode_int[15:8] == 8'd220) |			// aastore_quick
		(opcode_int[15:8] == 8'd81) |			// fastore
		(opcode_int[15:8] == 8'd84) |			// bastore
		(opcode_int[15:8] == 8'd85) |			// castore
		(opcode_int[15:8] == 8'd86) |			// sastore
		((opcode_int[15:8] == 8'd148) & second_cyc) |	// lcmp
		((opcode_int[15:8] == 8'd151) & second_cyc) |	// dcmpl
		((opcode_int[15:8] == 8'd152) & second_cyc) |	// dcmpg
		(opcode_int[15:8] == 8'd209) 			// putfield2_quick
	);

assign	inc_optop_4 = (

		(opcode_int[15:8] == 8'd80) |			// lastore
		(opcode_int[15:8] == 8'd82)			// dastore

	);

assign  no_change_optop = !(inc_optop_1 | inc_optop_2 | inc_optop_3 |
                            inc_optop_4 | dec_optop_1 | dec_optop_2 );
// BG2 op sometimes pushes 1 item onto stack and sometimes 2. Because of
// this it's difficult to determine the optop_offset just from group
// information. Hence we need  to decode BG2 and then use grouping
// info. to calculate the offset. For ex. for LV LB BG2 (group_3_r)
// If BG2 pushes one item onto stack, then decoding BG2 we'll get optop
// offset as +1 (it consumes 2 and pushes 1), but if we use the group info.
// (in this case group_3), then offset is -2 +1 (since 2 operands needed by
// BG2 are now available within the insgtruction itself  instead of popping
// them from scache. Same holds good for groups  5 and 6 (LV BG2 and LV BG1)


// So for groups 5 and 6 decrement the decode value of offset by 1 
// and for group 3 by 2 and so-on

assign	no_change = !(group_3_r | group_5_r | group_6_r);

// Since we don't have a 9_32 mux, we'll split them into 5_32 and 4_32 muxes
// and then use another 2_32 mux

assign	net_optop_sel1[4] = dec_optop_2 & (group_3_r); 			// optop - 4

assign	net_optop_sel1[3] = dec_optop_2 & (group_5_r | group_6_r) 		
				| dec_optop_1 & (group_3_r); 		// optop - 3

assign	net_optop_sel1[2] = dec_optop_2 & (no_change) |
				dec_optop_1 & (group_5_r | group_6_r) |
				no_change_optop & (group_3_r); 		// optop - 2

assign	net_optop_sel1[1] = dec_optop_1 & (no_change) |
			  	no_change_optop & (group_5_r | group_6_r) |
				inc_optop_1 & (group_3_r); 		// optop - 1

assign	net_optop_sel1[0] = !(|net_optop_sel1[4:1]);			// optop + 4


assign	net_optop_sel2[3] = inc_optop_3 & (no_change) |
				inc_optop_4 & (group_5_r | group_6_r) ;	// optop + 3

assign	net_optop_sel2[2] = inc_optop_2 & (no_change) |
				inc_optop_3 & (group_5_r | group_6_r) |
				inc_optop_4 & (group_3_r) ; 		// optop + 2

assign	net_optop_sel2[1] = inc_optop_1 & (no_change) |
				inc_optop_2 & (group_5_r | group_6_r) |
				inc_optop_3 & (group_3_r) ; 		// optop + 1

assign	net_optop_sel2[0] = !(|net_optop_sel2[3:1]);


assign	net_optop_sel[1] =  |(net_optop_sel1[4:1]) | inc_optop_4 & no_change;
assign	net_optop_sel[0] = !(net_optop_sel[1]);
				
endmodule
	
[Up: rcu_ctl comp_bypass_reg_rs1_e][Up: rcu_ctl comp_bypass_reg_rs1_c][Up: rcu_ctl comp_bypass_reg_rs1_w][Up: rcu_ctl comp_bypass_reg_rs2_e][Up: rcu_ctl comp_bypass_reg_rs2_c][Up: rcu_ctl comp_bypass_reg_rs2_w]
module	cmp_we_4 (

	in1,
	in2,
	enable,
	out
);

input	[3:0]	in1;
input	[3:0]	in2;
input		enable;
output		out;

assign	out = (in1 == in2) & enable;

endmodule

module pri_encod_3 (

	in0,
	in1,
	in2,
	out 
);

input		in0;
input		in1;
input		in2;
output	[2:0]	out;

assign	out[0] = in0;
assign	out[1] = !in0 & in1;
assign	out[2] = !in0 & !in1 & in2;

endmodule

123
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This page: Created:Wed Mar 24 09:43:21 1999
From: /import/jet-pj2-sim/rahim/picoJava-II/design/iu/rcu/rtl/rcu_ctl.v

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